cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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grlib_ahb_apb_pnp.h (1921B)

      1/*
      2 * GRLIB AHB APB PNP
      3 *
      4 *  Copyright (C) 2019 AdaCore
      5 *
      6 *  Developed by :
      7 *  Frederic Konrad   <frederic.konrad@adacore.com>
      8 *
      9 * This program is free software; you can redistribute it and/or modify
     10 * it under the terms of the GNU General Public License as published by
     11 * the Free Software Foundation, either version 2 of the License, or
     12 * (at your option) any later version.
     13 *
     14 * This program is distributed in the hope that it will be useful,
     15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17 * GNU General Public License for more details.
     18 *
     19 * You should have received a copy of the GNU General Public License along
     20 * with this program; if not, see <http://www.gnu.org/licenses/>.
     21 *
     22 */
     23
     24#ifndef GRLIB_AHB_APB_PNP_H
     25#define GRLIB_AHB_APB_PNP_H
     26#include "qom/object.h"
     27
     28#define TYPE_GRLIB_AHB_PNP "grlib-ahbpnp"
     29OBJECT_DECLARE_SIMPLE_TYPE(AHBPnp, GRLIB_AHB_PNP)
     30
     31#define TYPE_GRLIB_APB_PNP "grlib-apbpnp"
     32OBJECT_DECLARE_SIMPLE_TYPE(APBPnp, GRLIB_APB_PNP)
     33
     34void grlib_ahb_pnp_add_entry(AHBPnp *dev, uint32_t address, uint32_t mask,
     35                             uint8_t vendor, uint16_t device, int slave,
     36                             int type);
     37void grlib_apb_pnp_add_entry(APBPnp *dev, uint32_t address, uint32_t mask,
     38                             uint8_t vendor, uint16_t device, uint8_t version,
     39                             uint8_t irq, int type);
     40
     41/* VENDORS */
     42#define GRLIB_VENDOR_GAISLER (0x01)
     43/* DEVICES */
     44#define GRLIB_LEON3_DEV      (0x03)
     45#define GRLIB_APBMST_DEV     (0x06)
     46#define GRLIB_APBUART_DEV    (0x0C)
     47#define GRLIB_IRQMP_DEV      (0x0D)
     48#define GRLIB_GPTIMER_DEV    (0x11)
     49/* TYPE */
     50#define GRLIB_CPU_AREA       (0x00)
     51#define GRLIB_APBIO_AREA     (0x01)
     52#define GRLIB_AHBMEM_AREA    (0x02)
     53
     54#define GRLIB_AHB_MASTER     (0x00)
     55#define GRLIB_AHB_SLAVE      (0x01)
     56
     57#endif /* GRLIB_AHB_APB_PNP_H */