cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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nrf51_nvm.h (1692B)


      1/*
      2 * Nordic Semiconductor nRF51 non-volatile memory
      3 *
      4 * It provides an interface to erase regions in flash memory.
      5 * Furthermore it provides the user and factory information registers.
      6 *
      7 * QEMU interface:
      8 * + sysbus MMIO regions 0: NVMC peripheral registers
      9 * + sysbus MMIO regions 1: FICR peripheral registers
     10 * + sysbus MMIO regions 2: UICR peripheral registers
     11 * + flash-size property: flash size in bytes.
     12 *
     13 * Accuracy of the peripheral model:
     14 * + Code regions (MPU configuration) are disregarded.
     15 *
     16 * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
     17 *
     18 * This code is licensed under the GPL version 2 or later.  See
     19 * the COPYING file in the top-level directory.
     20 *
     21 */
     22#ifndef NRF51_NVM_H
     23#define NRF51_NVM_H
     24
     25#include "hw/sysbus.h"
     26#include "qom/object.h"
     27#define TYPE_NRF51_NVM "nrf51_soc.nvm"
     28OBJECT_DECLARE_SIMPLE_TYPE(NRF51NVMState, NRF51_NVM)
     29
     30#define NRF51_UICR_FIXTURE_SIZE 64
     31
     32#define NRF51_NVMC_SIZE         0x1000
     33
     34#define NRF51_NVMC_READY        0x400
     35#define NRF51_NVMC_READY_READY  0x01
     36#define NRF51_NVMC_CONFIG       0x504
     37#define NRF51_NVMC_CONFIG_MASK  0x03
     38#define NRF51_NVMC_CONFIG_WEN   0x01
     39#define NRF51_NVMC_CONFIG_EEN   0x02
     40#define NRF51_NVMC_ERASEPCR1    0x508
     41#define NRF51_NVMC_ERASEPCR0    0x510
     42#define NRF51_NVMC_ERASEALL     0x50C
     43#define NRF51_NVMC_ERASEUICR    0x514
     44#define NRF51_NVMC_ERASE        0x01
     45
     46#define NRF51_UICR_SIZE         0x100
     47
     48struct NRF51NVMState {
     49    SysBusDevice parent_obj;
     50
     51    MemoryRegion mmio;
     52    MemoryRegion ficr;
     53    MemoryRegion uicr;
     54    MemoryRegion flash;
     55
     56    uint32_t uicr_content[NRF51_UICR_FIXTURE_SIZE];
     57    uint32_t flash_size;
     58    uint8_t *storage;
     59
     60    uint32_t config;
     61
     62};
     63
     64
     65#endif