cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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pnv_pnor.h (635B)

      1/*
      2 * QEMU PowerNV PNOR simple model
      3 *
      4 * Copyright (c) 2019, IBM Corporation.
      5 *
      6 * This code is licensed under the GPL version 2 or later. See the
      7 * COPYING file in the top-level directory.
      8 */
      9#ifndef _PPC_PNV_PNOR_H
     10#define _PPC_PNV_PNOR_H
     11#include "qom/object.h"
     12
     13/*
     14 * PNOR offset on the LPC FW address space
     15 */
     16#define PNOR_SPI_OFFSET         0x0c000000UL
     17
     18#define TYPE_PNV_PNOR  "pnv-pnor"
     19OBJECT_DECLARE_SIMPLE_TYPE(PnvPnor, PNV_PNOR)
     20
     21struct PnvPnor {
     22    SysBusDevice   parent_obj;
     23
     24    BlockBackend   *blk;
     25
     26    uint8_t        *storage;
     27    int64_t        size;
     28    MemoryRegion   mmio;
     29};
     30
     31#endif /* _PPC_PNV_PNOR_H */