cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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spapr_numa.h (1405B)

      1/*
      2 * QEMU PowerPC pSeries Logical Partition NUMA associativity handling
      3 *
      4 * Copyright IBM Corp. 2020
      5 *
      6 * Authors:
      7 *  Daniel Henrique Barboza      <danielhb413@gmail.com>
      8 *
      9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
     10 * See the COPYING file in the top-level directory.
     11 */
     12
     13#ifndef HW_SPAPR_NUMA_H
     14#define HW_SPAPR_NUMA_H
     15
     16#include "hw/boards.h"
     17#include "hw/ppc/spapr.h"
     18
     19/*
     20 * Having both SpaprMachineState and MachineState as arguments
     21 * feels odd, but it will spare a MACHINE() call inside the
     22 * function. spapr_machine_init() is the only caller for it, and
     23 * it has both pointers resolved already.
     24 */
     25void spapr_numa_associativity_init(SpaprMachineState *spapr,
     26                                   MachineState *machine);
     27void spapr_numa_associativity_check(SpaprMachineState *spapr);
     28void spapr_numa_write_rtas_dt(SpaprMachineState *spapr, void *fdt, int rtas);
     29void spapr_numa_write_associativity_dt(SpaprMachineState *spapr, void *fdt,
     30                                       int offset, int nodeid);
     31int spapr_numa_fixup_cpu_dt(SpaprMachineState *spapr, void *fdt,
     32                            int offset, PowerPCCPU *cpu);
     33int spapr_numa_write_assoc_lookup_arrays(SpaprMachineState *spapr, void *fdt,
     34                                         int offset);
     35unsigned int spapr_numa_initial_nvgpu_numa_id(MachineState *machine);
     36
     37#endif /* HW_SPAPR_NUMA_H */