cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

spike.h (1290B)

      1/*
      2 * Spike machine interface
      3 *
      4 * Copyright (c) 2017 SiFive, Inc.
      5 *
      6 * This program is free software; you can redistribute it and/or modify it
      7 * under the terms and conditions of the GNU General Public License,
      8 * version 2 or later, as published by the Free Software Foundation.
      9 *
     10 * This program is distributed in the hope it will be useful, but WITHOUT
     11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
     12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
     13 * more details.
     14 *
     15 * You should have received a copy of the GNU General Public License along with
     16 * this program.  If not, see <http://www.gnu.org/licenses/>.
     17 */
     18
     19#ifndef HW_RISCV_SPIKE_H
     20#define HW_RISCV_SPIKE_H
     21
     22#include "hw/riscv/riscv_hart.h"
     23#include "hw/sysbus.h"
     24#include "qom/object.h"
     25
     26#define SPIKE_CPUS_MAX 8
     27#define SPIKE_SOCKETS_MAX 8
     28
     29#define TYPE_SPIKE_MACHINE MACHINE_TYPE_NAME("spike")
     30typedef struct SpikeState SpikeState;
     31DECLARE_INSTANCE_CHECKER(SpikeState, SPIKE_MACHINE,
     32                         TYPE_SPIKE_MACHINE)
     33
     34struct SpikeState {
     35    /*< private >*/
     36    MachineState parent;
     37
     38    /*< public >*/
     39    RISCVHartArrayState soc[SPIKE_SOCKETS_MAX];
     40    void *fdt;
     41    int fdt_size;
     42};
     43
     44enum {
     45    SPIKE_MROM,
     46    SPIKE_CLINT,
     47    SPIKE_DRAM
     48};
     49
     50#endif