cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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allwinner-rtc.h (3250B)

      1/*
      2 * Allwinner Real Time Clock emulation
      3 *
      4 * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
      5 *
      6 * This program is free software: you can redistribute it and/or modify
      7 * it under the terms of the GNU General Public License as published by
      8 * the Free Software Foundation, either version 2 of the License, or
      9 * (at your option) any later version.
     10 *
     11 * This program is distributed in the hope that it will be useful,
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     14 * GNU General Public License for more details.
     15 *
     16 * You should have received a copy of the GNU General Public License
     17 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
     18 */
     19
     20#ifndef HW_MISC_ALLWINNER_RTC_H
     21#define HW_MISC_ALLWINNER_RTC_H
     22
     23#include "qom/object.h"
     24#include "hw/sysbus.h"
     25
     26/**
     27 * Constants
     28 * @{
     29 */
     30
     31/** Highest register address used by RTC device */
     32#define AW_RTC_REGS_MAXADDR     (0x200)
     33
     34/** Total number of known registers */
     35#define AW_RTC_REGS_NUM         (AW_RTC_REGS_MAXADDR / sizeof(uint32_t))
     36
     37/** @} */
     38
     39/**
     40 * Object model types
     41 * @{
     42 */
     43
     44/** Generic Allwinner RTC device (abstract) */
     45#define TYPE_AW_RTC          "allwinner-rtc"
     46
     47/** Allwinner RTC sun4i family (A10, A12) */
     48#define TYPE_AW_RTC_SUN4I    TYPE_AW_RTC "-sun4i"
     49
     50/** Allwinner RTC sun6i family and newer (A31, H2+, H3, etc) */
     51#define TYPE_AW_RTC_SUN6I    TYPE_AW_RTC "-sun6i"
     52
     53/** Allwinner RTC sun7i family (A20) */
     54#define TYPE_AW_RTC_SUN7I    TYPE_AW_RTC "-sun7i"
     55
     56/** @} */
     57
     58/**
     59 * Object model macros
     60 * @{
     61 */
     62
     63OBJECT_DECLARE_TYPE(AwRtcState, AwRtcClass, AW_RTC)
     64
     65/** @} */
     66
     67/**
     68 * Allwinner RTC per-object instance state.
     69 */
     70struct AwRtcState {
     71    /*< private >*/
     72    SysBusDevice parent_obj;
     73    /*< public >*/
     74
     75    /**
     76     * Actual year represented by the device when year counter is zero
     77     *
     78     * Can be overridden by the user using the corresponding 'base-year'
     79     * property. The base year used by the target OS driver can vary, for
     80     * example the Linux driver for sun6i uses 1970 while NetBSD uses 2000.
     81     */
     82    int base_year;
     83
     84    /** Maps I/O registers in physical memory */
     85    MemoryRegion iomem;
     86
     87    /** Array of hardware registers */
     88    uint32_t regs[AW_RTC_REGS_NUM];
     89
     90};
     91
     92/**
     93 * Allwinner RTC class-level struct.
     94 *
     95 * This struct is filled by each sunxi device specific code
     96 * such that the generic code can use this struct to support
     97 * all devices.
     98 */
     99struct AwRtcClass {
    100    /*< private >*/
    101    SysBusDeviceClass parent_class;
    102    /*< public >*/
    103
    104    /** Defines device specific register map */
    105    const uint8_t *regmap;
    106
    107    /** Size of the regmap in bytes */
    108    size_t regmap_size;
    109
    110    /**
    111     * Read device specific register
    112     *
    113     * @offset: register offset to read
    114     * @return true if register read successful, false otherwise
    115     */
    116    bool (*read)(AwRtcState *s, uint32_t offset);
    117
    118    /**
    119     * Write device specific register
    120     *
    121     * @offset: register offset to write
    122     * @data: value to set in register
    123     * @return true if register write successful, false otherwise
    124     */
    125    bool (*write)(AwRtcState *s, uint32_t offset, uint32_t data);
    126
    127};
    128
    129#endif /* HW_MISC_ALLWINNER_RTC_H */