cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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sclp.h (7676B)


      1/*
      2 * SCLP Support
      3 *
      4 * Copyright IBM, Corp. 2012
      5 *
      6 * Authors:
      7 *  Christian Borntraeger <borntraeger@de.ibm.com>
      8 *
      9 * This work is licensed under the terms of the GNU GPL, version 2 or (at your
     10 * option) any later version.  See the COPYING file in the top-level directory.
     11 *
     12 */
     13
     14#ifndef HW_S390_SCLP_H
     15#define HW_S390_SCLP_H
     16
     17#include "hw/sysbus.h"
     18#include "target/s390x/cpu-qom.h"
     19#include "qom/object.h"
     20
     21#define SCLP_CMD_CODE_MASK                      0xffff00ff
     22
     23/* SCLP command codes */
     24#define SCLP_CMDW_READ_SCP_INFO                 0x00020001
     25#define SCLP_CMDW_READ_SCP_INFO_FORCED          0x00120001
     26#define SCLP_READ_STORAGE_ELEMENT_INFO          0x00040001
     27#define SCLP_ATTACH_STORAGE_ELEMENT             0x00080001
     28#define SCLP_ASSIGN_STORAGE                     0x000D0001
     29#define SCLP_UNASSIGN_STORAGE                   0x000C0001
     30#define SCLP_CMD_READ_EVENT_DATA                0x00770005
     31#define SCLP_CMD_WRITE_EVENT_DATA               0x00760005
     32#define SCLP_CMD_WRITE_EVENT_MASK               0x00780005
     33
     34/* SCLP Memory hotplug codes */
     35#define SCLP_FC_ASSIGN_ATTACH_READ_STOR         0xE00000000000ULL
     36#define SCLP_STARTING_SUBINCREMENT_ID           0x10001
     37#define SCLP_INCREMENT_UNIT                     0x10000
     38#define MAX_STORAGE_INCREMENTS                  1020
     39
     40/* CPU hotplug SCLP codes */
     41#define SCLP_HAS_CPU_INFO                       0x0C00000000000000ULL
     42#define SCLP_CMDW_READ_CPU_INFO                 0x00010001
     43#define SCLP_CMDW_CONFIGURE_CPU                 0x00110001
     44#define SCLP_CMDW_DECONFIGURE_CPU               0x00100001
     45
     46/* SCLP PCI codes */
     47#define SCLP_HAS_IOA_RECONFIG                   0x0000000040000000ULL
     48#define SCLP_CMDW_CONFIGURE_IOA                 0x001a0001
     49#define SCLP_CMDW_DECONFIGURE_IOA               0x001b0001
     50#define SCLP_RECONFIG_PCI_ATYPE                 2
     51
     52/* SCLP response codes */
     53#define SCLP_RC_NORMAL_READ_COMPLETION          0x0010
     54#define SCLP_RC_NORMAL_COMPLETION               0x0020
     55#define SCLP_RC_SCCB_BOUNDARY_VIOLATION         0x0100
     56#define SCLP_RC_NO_ACTION_REQUIRED              0x0120
     57#define SCLP_RC_INVALID_SCLP_COMMAND            0x01f0
     58#define SCLP_RC_CONTAINED_EQUIPMENT_CHECK       0x0340
     59#define SCLP_RC_INSUFFICIENT_SCCB_LENGTH        0x0300
     60#define SCLP_RC_STANDBY_READ_COMPLETION         0x0410
     61#define SCLP_RC_ADAPTER_IN_RESERVED_STATE       0x05f0
     62#define SCLP_RC_ADAPTER_TYPE_NOT_RECOGNIZED     0x06f0
     63#define SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED       0x09f0
     64#define SCLP_RC_INVALID_FUNCTION                0x40f0
     65#define SCLP_RC_NO_EVENT_BUFFERS_STORED         0x60f0
     66#define SCLP_RC_INVALID_SELECTION_MASK          0x70f0
     67#define SCLP_RC_INCONSISTENT_LENGTHS            0x72f0
     68#define SCLP_RC_EVENT_BUFFER_SYNTAX_ERROR       0x73f0
     69#define SCLP_RC_INVALID_MASK_LENGTH             0x74f0
     70
     71
     72/* Service Call Control Block (SCCB) and its elements */
     73
     74#define SCCB_SIZE 4096
     75
     76#define SCLP_VARIABLE_LENGTH_RESPONSE           0x80
     77#define SCLP_EVENT_BUFFER_ACCEPTED              0x80
     78
     79#define SCLP_FC_NORMAL_WRITE                    0
     80
     81/*
     82 * Normally packed structures are not the right thing to do, since all code
     83 * must take care of endianness. We cannot use ldl_phys and friends for two
     84 * reasons, though:
     85 * - some of the embedded structures below the SCCB can appear multiple times
     86 *   at different locations, so there is no fixed offset
     87 * - we work on a private copy of the SCCB, since there are several length
     88 *   fields, that would cause a security nightmare if we allow the guest to
     89 *   alter the structure while we parse it. We cannot use ldl_p and friends
     90 *   either without doing pointer arithmetics
     91 * So we have to double check that all users of sclp data structures use the
     92 * right endianness wrappers.
     93 */
     94typedef struct SCCBHeader {
     95    uint16_t length;
     96    uint8_t function_code;
     97    uint8_t control_mask[3];
     98    uint16_t response_code;
     99} QEMU_PACKED SCCBHeader;
    100
    101#define SCCB_DATA_LEN (SCCB_SIZE - sizeof(SCCBHeader))
    102#define SCCB_CPU_FEATURE_LEN 6
    103
    104/* CPU information */
    105typedef struct CPUEntry {
    106    uint8_t address;
    107    uint8_t reserved0;
    108    uint8_t features[SCCB_CPU_FEATURE_LEN];
    109    uint8_t reserved2[6];
    110    uint8_t type;
    111    uint8_t reserved1;
    112} QEMU_PACKED CPUEntry;
    113
    114#define SCLP_READ_SCP_INFO_FIXED_CPU_OFFSET     128
    115typedef struct ReadInfo {
    116    SCCBHeader h;
    117    uint16_t rnmax;
    118    uint8_t rnsize;
    119    uint8_t  _reserved1[16 - 11];       /* 11-15 */
    120    uint16_t entries_cpu;               /* 16-17 */
    121    uint16_t offset_cpu;                /* 18-19 */
    122    uint8_t  _reserved2[24 - 20];       /* 20-23 */
    123    uint8_t  loadparm[8];               /* 24-31 */
    124    uint8_t  _reserved3[48 - 32];       /* 32-47 */
    125    uint64_t facilities;                /* 48-55 */
    126    uint8_t  _reserved0[76 - 56];       /* 56-75 */
    127    uint32_t ibc_val;
    128    uint8_t  conf_char[99 - 80];        /* 80-98 */
    129    uint8_t mha_pow;
    130    uint32_t rnsize2;
    131    uint64_t rnmax2;
    132    uint8_t  _reserved6[116 - 112];     /* 112-115 */
    133    uint8_t  conf_char_ext[120 - 116];   /* 116-119 */
    134    uint16_t highest_cpu;
    135    uint8_t  _reserved5[124 - 122];     /* 122-123 */
    136    uint32_t hmfai;
    137    uint8_t  _reserved7[134 - 128];     /* 128-133 */
    138    uint8_t  fac134;
    139    uint8_t  _reserved8[144 - 135];     /* 135-143 */
    140    struct CPUEntry entries[];
    141    /*
    142     * When the Extended-Length SCCB (ELS) feature is enabled the
    143     * start of the entries field begins at an offset denoted by the
    144     * offset_cpu field, otherwise it's at an offset of 128.
    145     */
    146} QEMU_PACKED ReadInfo;
    147
    148typedef struct ReadCpuInfo {
    149    SCCBHeader h;
    150    uint16_t nr_configured;         /* 8-9 */
    151    uint16_t offset_configured;     /* 10-11 */
    152    uint16_t nr_standby;            /* 12-13 */
    153    uint16_t offset_standby;        /* 14-15 */
    154    uint8_t reserved0[24-16];       /* 16-23 */
    155    struct CPUEntry entries[];
    156} QEMU_PACKED ReadCpuInfo;
    157
    158typedef struct ReadStorageElementInfo {
    159    SCCBHeader h;
    160    uint16_t max_id;
    161    uint16_t assigned;
    162    uint16_t standby;
    163    uint8_t _reserved0[16 - 14]; /* 14-15 */
    164    uint32_t entries[];
    165} QEMU_PACKED ReadStorageElementInfo;
    166
    167typedef struct AttachStorageElement {
    168    SCCBHeader h;
    169    uint8_t _reserved0[10 - 8];  /* 8-9 */
    170    uint16_t assigned;
    171    uint8_t _reserved1[16 - 12]; /* 12-15 */
    172    uint32_t entries[];
    173} QEMU_PACKED AttachStorageElement;
    174
    175typedef struct AssignStorage {
    176    SCCBHeader h;
    177    uint16_t rn;
    178} QEMU_PACKED AssignStorage;
    179
    180typedef struct IoaCfgSccb {
    181    SCCBHeader header;
    182    uint8_t atype;
    183    uint8_t reserved1;
    184    uint16_t reserved2;
    185    uint32_t aid;
    186} QEMU_PACKED IoaCfgSccb;
    187
    188typedef struct SCCB {
    189    SCCBHeader h;
    190    char data[];
    191 } QEMU_PACKED SCCB;
    192
    193#define TYPE_SCLP "sclp"
    194OBJECT_DECLARE_TYPE(SCLPDevice, SCLPDeviceClass,
    195                    SCLP)
    196
    197struct SCLPEventFacility;
    198
    199struct SCLPDevice {
    200    /* private */
    201    DeviceState parent_obj;
    202    struct SCLPEventFacility *event_facility;
    203    int increment_size;
    204
    205    /* public */
    206};
    207
    208struct SCLPDeviceClass {
    209    /* private */
    210    DeviceClass parent_class;
    211    void (*read_SCP_info)(SCLPDevice *sclp, SCCB *sccb);
    212    void (*read_cpu_info)(SCLPDevice *sclp, SCCB *sccb);
    213
    214    /* public */
    215    void (*execute)(SCLPDevice *sclp, SCCB *sccb, uint32_t code);
    216    void (*service_interrupt)(SCLPDevice *sclp, uint32_t sccb);
    217};
    218
    219static inline int sccb_data_len(SCCB *sccb)
    220{
    221    return be16_to_cpu(sccb->h.length) - sizeof(sccb->h);
    222}
    223
    224
    225void s390_sclp_init(void);
    226void sclp_service_interrupt(uint32_t sccb);
    227void raise_irq_cpu_hotplug(void);
    228int sclp_service_call(CPUS390XState *env, uint64_t sccb, uint32_t code);
    229int sclp_service_call_protected(CPUS390XState *env, uint64_t sccb,
    230                                uint32_t code);
    231
    232#endif