cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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armv7m_systick.h (1142B)

      1/*
      2 * ARMv7M SysTick timer
      3 *
      4 * Copyright (c) 2006-2007 CodeSourcery.
      5 * Written by Paul Brook
      6 * Copyright (c) 2017 Linaro Ltd
      7 * Written by Peter Maydell
      8 *
      9 * This code is licensed under the GPL (version 2 or later).
     10 */
     11
     12#ifndef HW_TIMER_ARMV7M_SYSTICK_H
     13#define HW_TIMER_ARMV7M_SYSTICK_H
     14
     15#include "hw/sysbus.h"
     16#include "qom/object.h"
     17#include "hw/ptimer.h"
     18#include "hw/clock.h"
     19
     20#define TYPE_SYSTICK "armv7m_systick"
     21
     22OBJECT_DECLARE_SIMPLE_TYPE(SysTickState, SYSTICK)
     23
     24/*
     25 * QEMU interface:
     26 *  + sysbus MMIO region 0 is the register interface (covering
     27 *    the registers which are mapped at address 0xE000E010)
     28 *  + sysbus IRQ 0 is the interrupt line to the NVIC
     29 *  + Clock input "refclk" is the external reference clock
     30 *    (used when SYST_CSR.CLKSOURCE == 0)
     31 *  + Clock input "cpuclk" is the main CPU clock
     32 *    (used when SYST_CSR.CLKSOURCE == 1)
     33 */
     34
     35struct SysTickState {
     36    /*< private >*/
     37    SysBusDevice parent_obj;
     38    /*< public >*/
     39
     40    uint32_t control;
     41    uint32_t reload;
     42    int64_t tick;
     43    ptimer_state *ptimer;
     44    MemoryRegion iomem;
     45    qemu_irq irq;
     46    Clock *refclk;
     47    Clock *cpuclk;
     48};
     49
     50#endif