cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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hpet.h (2058B)


      1/*
      2 * QEMU Emulated HPET support
      3 *
      4 * Copyright IBM, Corp. 2008
      5 *
      6 * Authors:
      7 *  Beth Kon   <bkon@us.ibm.com>
      8 *
      9 * This work is licensed under the terms of the GNU GPL, version 2.  See
     10 * the COPYING file in the top-level directory.
     11 *
     12 */
     13
     14#ifndef HW_HPET_H
     15#define HW_HPET_H
     16
     17#include "qom/object.h"
     18
     19#define HPET_BASE               0xfed00000
     20#define HPET_LEN                0x400
     21#define HPET_CLK_PERIOD         10 /* 10 ns*/
     22
     23#define FS_PER_NS 1000000       /* 1000000 femtoseconds == 1 ns */
     24#define HPET_MIN_TIMERS         3
     25#define HPET_MAX_TIMERS         32
     26
     27#define HPET_NUM_IRQ_ROUTES     32
     28
     29#define HPET_LEGACY_PIT_INT     0
     30#define HPET_LEGACY_RTC_INT     1
     31
     32#define HPET_CFG_ENABLE 0x001
     33#define HPET_CFG_LEGACY 0x002
     34
     35#define HPET_ID         0x000
     36#define HPET_PERIOD     0x004
     37#define HPET_CFG        0x010
     38#define HPET_STATUS     0x020
     39#define HPET_COUNTER    0x0f0
     40#define HPET_TN_CFG     0x000
     41#define HPET_TN_CMP     0x008
     42#define HPET_TN_ROUTE   0x010
     43#define HPET_CFG_WRITE_MASK  0x3
     44
     45#define HPET_ID_NUM_TIM_SHIFT   8
     46#define HPET_ID_NUM_TIM_MASK    0x1f00
     47
     48#define HPET_TN_TYPE_LEVEL       0x002
     49#define HPET_TN_ENABLE           0x004
     50#define HPET_TN_PERIODIC         0x008
     51#define HPET_TN_PERIODIC_CAP     0x010
     52#define HPET_TN_SIZE_CAP         0x020
     53#define HPET_TN_SETVAL           0x040
     54#define HPET_TN_32BIT            0x100
     55#define HPET_TN_INT_ROUTE_MASK  0x3e00
     56#define HPET_TN_FSB_ENABLE      0x4000
     57#define HPET_TN_FSB_CAP         0x8000
     58#define HPET_TN_CFG_WRITE_MASK  0x7f4e
     59#define HPET_TN_INT_ROUTE_SHIFT      9
     60#define HPET_TN_INT_ROUTE_CAP_SHIFT 32
     61#define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U
     62
     63struct hpet_fw_entry
     64{
     65    uint32_t event_timer_block_id;
     66    uint64_t address;
     67    uint16_t min_tick;
     68    uint8_t page_prot;
     69} QEMU_PACKED;
     70
     71struct hpet_fw_config
     72{
     73    uint8_t count;
     74    struct hpet_fw_entry hpet[8];
     75} QEMU_PACKED;
     76
     77extern struct hpet_fw_config hpet_cfg;
     78
     79#define TYPE_HPET "hpet"
     80
     81static inline bool hpet_find(void)
     82{
     83    return object_resolve_path_type("", TYPE_HPET, NULL);
     84}
     85
     86#endif