cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

ibex_timer.h (1761B)

      1/*
      2 * QEMU lowRISC Ibex Timer device
      3 *
      4 * Copyright (c) 2021 Western Digital
      5 *
      6 * Permission is hereby granted, free of charge, to any person obtaining a copy
      7 * of this software and associated documentation files (the "Software"), to deal
      8 * in the Software without restriction, including without limitation the rights
      9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     10 * copies of the Software, and to permit persons to whom the Software is
     11 * furnished to do so, subject to the following conditions:
     12 *
     13 * The above copyright notice and this permission notice shall be included in
     14 * all copies or substantial portions of the Software.
     15 *
     16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
     19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     22 * THE SOFTWARE.
     23 */
     24
     25#ifndef HW_IBEX_TIMER_H
     26#define HW_IBEX_TIMER_H
     27
     28#include "hw/sysbus.h"
     29
     30#define TYPE_IBEX_TIMER "ibex-timer"
     31OBJECT_DECLARE_SIMPLE_TYPE(IbexTimerState, IBEX_TIMER)
     32
     33struct IbexTimerState {
     34    /* <private> */
     35    SysBusDevice parent_obj;
     36
     37    /* <public> */
     38    MemoryRegion mmio;
     39
     40    uint32_t timer_ctrl;
     41    uint32_t timer_cfg0;
     42    uint32_t timer_compare_lower0;
     43    uint32_t timer_compare_upper0;
     44    uint32_t timer_intr_enable;
     45    uint32_t timer_intr_state;
     46    uint32_t timer_intr_test;
     47
     48    uint32_t timebase_freq;
     49
     50    qemu_irq irq;
     51
     52    qemu_irq m_timer_irq;
     53};
     54#endif /* HW_IBEX_TIMER_H */