cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

sifive_pwm.h (2032B)

      1/*
      2 * SiFive PWM
      3 *
      4 * Copyright (c) 2020 Western Digital
      5 *
      6 * Author:  Alistair Francis <alistair.francis@wdc.com>
      7 *
      8 * Permission is hereby granted, free of charge, to any person obtaining a copy
      9 * of this software and associated documentation files (the "Software"), to deal
     10 * in the Software without restriction, including without limitation the rights
     11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     12 * copies of the Software, and to permit persons to whom the Software is
     13 * furnished to do so, subject to the following conditions:
     14 *
     15 * The above copyright notice and this permission notice shall be included in
     16 * all copies or substantial portions of the Software.
     17 *
     18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
     21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     24 * THE SOFTWARE.
     25 */
     26
     27#ifndef HW_SIFIVE_PWM_H
     28#define HW_SIFIVE_PWM_H
     29
     30#include "hw/sysbus.h"
     31#include "qemu/timer.h"
     32#include "qom/object.h"
     33
     34#define TYPE_SIFIVE_PWM "sifive-pwm"
     35
     36#define SIFIVE_PWM(obj) \
     37    OBJECT_CHECK(SiFivePwmState, (obj), TYPE_SIFIVE_PWM)
     38
     39#define SIFIVE_PWM_CHANS          4
     40#define SIFIVE_PWM_IRQS           SIFIVE_PWM_CHANS
     41
     42typedef struct SiFivePwmState {
     43    /* <private> */
     44    SysBusDevice parent_obj;
     45
     46    /* <public> */
     47    MemoryRegion mmio;
     48    QEMUTimer timer[SIFIVE_PWM_CHANS];
     49    /*
     50     * if en bit(s) set, is the number of ticks when pwmcount was 0
     51     * if en bit(s) not set, is the number of ticks in pwmcount
     52     */
     53    uint64_t tick_offset;
     54    uint64_t freq_hz;
     55
     56    uint32_t pwmcfg;
     57    uint32_t pwmcmp[SIFIVE_PWM_CHANS];
     58
     59    qemu_irq irqs[SIFIVE_PWM_IRQS];
     60} SiFivePwmState;
     61
     62#endif /* HW_SIFIVE_PWM_H */