cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

xlnx-usb-subsystem.h (1686B)

      1/*
      2 * QEMU model of the Xilinx usb subsystem
      3 *
      4 * Copyright (c) 2020 Xilinx Inc. Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
      5 *
      6 * Permission is hereby granted, free of charge, to any person obtaining a copy
      7 * of this software and associated documentation files (the "Software"), to deal
      8 * in the Software without restriction, including without limitation the rights
      9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     10 * copies of the Software, and to permit persons to whom the Software is
     11 * furnished to do so, subject to the following conditions:
     12 *
     13 * The above copyright notice and this permission notice shall be included in
     14 * all copies or substantial portions of the Software.
     15 *
     16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
     19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     22 * THE SOFTWARE.
     23 */
     24
     25#ifndef XLNX_VERSAL_USB_SUBSYSTEM_H
     26#define XLNX_VERSAL_USB_SUBSYSTEM_H
     27
     28#include "hw/usb/xlnx-versal-usb2-ctrl-regs.h"
     29#include "hw/usb/hcd-dwc3.h"
     30
     31#define TYPE_XILINX_VERSAL_USB2 "xlnx.versal-usb2"
     32
     33#define VERSAL_USB2(obj) \
     34     OBJECT_CHECK(VersalUsb2, (obj), TYPE_XILINX_VERSAL_USB2)
     35
     36typedef struct VersalUsb2 {
     37    SysBusDevice parent_obj;
     38    MemoryRegion dwc3_mr;
     39    MemoryRegion usb2Ctrl_mr;
     40
     41    VersalUsb2CtrlRegs usb2Ctrl;
     42    USBDWC3 dwc3;
     43} VersalUsb2;
     44
     45#endif