cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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virtio-iommu.h (1829B)

      1/*
      2 * virtio-iommu device
      3 *
      4 * Copyright (c) 2020 Red Hat, Inc.
      5 *
      6 * This program is free software; you can redistribute it and/or modify it
      7 * under the terms and conditions of the GNU General Public License,
      8 * version 2 or later, as published by the Free Software Foundation.
      9 *
     10 * This program is distributed in the hope it will be useful, but WITHOUT
     11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
     12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
     13 * more details.
     14 *
     15 * You should have received a copy of the GNU General Public License along with
     16 * this program.  If not, see <http://www.gnu.org/licenses/>.
     17 *
     18 */
     19
     20#ifndef QEMU_VIRTIO_IOMMU_H
     21#define QEMU_VIRTIO_IOMMU_H
     22
     23#include "standard-headers/linux/virtio_iommu.h"
     24#include "hw/virtio/virtio.h"
     25#include "hw/pci/pci.h"
     26#include "qom/object.h"
     27
     28#define TYPE_VIRTIO_IOMMU "virtio-iommu-device"
     29#define TYPE_VIRTIO_IOMMU_PCI "virtio-iommu-device-base"
     30OBJECT_DECLARE_SIMPLE_TYPE(VirtIOIOMMU, VIRTIO_IOMMU)
     31
     32#define TYPE_VIRTIO_IOMMU_MEMORY_REGION "virtio-iommu-memory-region"
     33
     34typedef struct IOMMUDevice {
     35    void         *viommu;
     36    PCIBus       *bus;
     37    int           devfn;
     38    IOMMUMemoryRegion  iommu_mr;
     39    AddressSpace  as;
     40} IOMMUDevice;
     41
     42typedef struct IOMMUPciBus {
     43    PCIBus       *bus;
     44    IOMMUDevice  *pbdev[]; /* Parent array is sparse, so dynamically alloc */
     45} IOMMUPciBus;
     46
     47struct VirtIOIOMMU {
     48    VirtIODevice parent_obj;
     49    VirtQueue *req_vq;
     50    VirtQueue *event_vq;
     51    struct virtio_iommu_config config;
     52    uint64_t features;
     53    GHashTable *as_by_busptr;
     54    IOMMUPciBus *iommu_pcibus_by_bus_num[PCI_BUS_MAX];
     55    PCIBus *primary_bus;
     56    ReservedRegion *reserved_regions;
     57    uint32_t nb_reserved_regions;
     58    GTree *domains;
     59    QemuMutex mutex;
     60    GTree *endpoints;
     61};
     62
     63#endif