cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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kvm_para.h (4380B)


      1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
      2#ifndef _ASM_X86_KVM_PARA_H
      3#define _ASM_X86_KVM_PARA_H
      4
      5#include "standard-headers/linux/types.h"
      6
      7/* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx.  It
      8 * should be used to determine that a VM is running under KVM.
      9 */
     10#define KVM_CPUID_SIGNATURE	0x40000000
     11
     12/* This CPUID returns two feature bitmaps in eax, edx. Before enabling
     13 * a particular paravirtualization, the appropriate feature bit should
     14 * be checked in eax. The performance hint feature bit should be checked
     15 * in edx.
     16 */
     17#define KVM_CPUID_FEATURES	0x40000001
     18#define KVM_FEATURE_CLOCKSOURCE		0
     19#define KVM_FEATURE_NOP_IO_DELAY	1
     20#define KVM_FEATURE_MMU_OP		2
     21/* This indicates that the new set of kvmclock msrs
     22 * are available. The use of 0x11 and 0x12 is deprecated
     23 */
     24#define KVM_FEATURE_CLOCKSOURCE2        3
     25#define KVM_FEATURE_ASYNC_PF		4
     26#define KVM_FEATURE_STEAL_TIME		5
     27#define KVM_FEATURE_PV_EOI		6
     28#define KVM_FEATURE_PV_UNHALT		7
     29#define KVM_FEATURE_PV_TLB_FLUSH	9
     30#define KVM_FEATURE_ASYNC_PF_VMEXIT	10
     31#define KVM_FEATURE_PV_SEND_IPI	11
     32#define KVM_FEATURE_POLL_CONTROL	12
     33#define KVM_FEATURE_PV_SCHED_YIELD	13
     34#define KVM_FEATURE_ASYNC_PF_INT	14
     35#define KVM_FEATURE_MSI_EXT_DEST_ID	15
     36#define KVM_FEATURE_HC_MAP_GPA_RANGE	16
     37#define KVM_FEATURE_MIGRATION_CONTROL	17
     38
     39#define KVM_HINTS_REALTIME      0
     40
     41/* The last 8 bits are used to indicate how to interpret the flags field
     42 * in pvclock structure. If no bits are set, all flags are ignored.
     43 */
     44#define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT	24
     45
     46#define MSR_KVM_WALL_CLOCK  0x11
     47#define MSR_KVM_SYSTEM_TIME 0x12
     48
     49#define KVM_MSR_ENABLED 1
     50/* Custom MSRs falls in the range 0x4b564d00-0x4b564dff */
     51#define MSR_KVM_WALL_CLOCK_NEW  0x4b564d00
     52#define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01
     53#define MSR_KVM_ASYNC_PF_EN 0x4b564d02
     54#define MSR_KVM_STEAL_TIME  0x4b564d03
     55#define MSR_KVM_PV_EOI_EN      0x4b564d04
     56#define MSR_KVM_POLL_CONTROL	0x4b564d05
     57#define MSR_KVM_ASYNC_PF_INT	0x4b564d06
     58#define MSR_KVM_ASYNC_PF_ACK	0x4b564d07
     59#define MSR_KVM_MIGRATION_CONTROL	0x4b564d08
     60
     61struct kvm_steal_time {
     62	uint64_t steal;
     63	uint32_t version;
     64	uint32_t flags;
     65	uint8_t  preempted;
     66	uint8_t  uint8_t_pad[3];
     67	uint32_t pad[11];
     68};
     69
     70#define KVM_VCPU_PREEMPTED          (1 << 0)
     71#define KVM_VCPU_FLUSH_TLB          (1 << 1)
     72
     73#define KVM_CLOCK_PAIRING_WALLCLOCK 0
     74struct kvm_clock_pairing {
     75	int64_t sec;
     76	int64_t nsec;
     77	uint64_t tsc;
     78	uint32_t flags;
     79	uint32_t pad[9];
     80};
     81
     82#define KVM_STEAL_ALIGNMENT_BITS 5
     83#define KVM_STEAL_VALID_BITS ((-1ULL << (KVM_STEAL_ALIGNMENT_BITS + 1)))
     84#define KVM_STEAL_RESERVED_MASK (((1 << KVM_STEAL_ALIGNMENT_BITS) - 1 ) << 1)
     85
     86#define KVM_MAX_MMU_OP_BATCH           32
     87
     88#define KVM_ASYNC_PF_ENABLED			(1 << 0)
     89#define KVM_ASYNC_PF_SEND_ALWAYS		(1 << 1)
     90#define KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT	(1 << 2)
     91#define KVM_ASYNC_PF_DELIVERY_AS_INT		(1 << 3)
     92
     93/* MSR_KVM_ASYNC_PF_INT */
     94#define KVM_ASYNC_PF_VEC_MASK			GENMASK(7, 0)
     95
     96/* MSR_KVM_MIGRATION_CONTROL */
     97#define KVM_MIGRATION_READY		(1 << 0)
     98
     99/* KVM_HC_MAP_GPA_RANGE */
    100#define KVM_MAP_GPA_RANGE_PAGE_SZ_4K	0
    101#define KVM_MAP_GPA_RANGE_PAGE_SZ_2M	(1 << 0)
    102#define KVM_MAP_GPA_RANGE_PAGE_SZ_1G	(1 << 1)
    103#define KVM_MAP_GPA_RANGE_ENC_STAT(n)	(n << 4)
    104#define KVM_MAP_GPA_RANGE_ENCRYPTED	KVM_MAP_GPA_RANGE_ENC_STAT(1)
    105#define KVM_MAP_GPA_RANGE_DECRYPTED	KVM_MAP_GPA_RANGE_ENC_STAT(0)
    106
    107/* Operations for KVM_HC_MMU_OP */
    108#define KVM_MMU_OP_WRITE_PTE            1
    109#define KVM_MMU_OP_FLUSH_TLB	        2
    110#define KVM_MMU_OP_RELEASE_PT	        3
    111
    112/* Payload for KVM_HC_MMU_OP */
    113struct kvm_mmu_op_header {
    114	uint32_t op;
    115	uint32_t pad;
    116};
    117
    118struct kvm_mmu_op_write_pte {
    119	struct kvm_mmu_op_header header;
    120	uint64_t pte_phys;
    121	uint64_t pte_val;
    122};
    123
    124struct kvm_mmu_op_flush_tlb {
    125	struct kvm_mmu_op_header header;
    126};
    127
    128struct kvm_mmu_op_release_pt {
    129	struct kvm_mmu_op_header header;
    130	uint64_t pt_phys;
    131};
    132
    133#define KVM_PV_REASON_PAGE_NOT_PRESENT 1
    134#define KVM_PV_REASON_PAGE_READY 2
    135
    136struct kvm_vcpu_pv_apf_data {
    137	/* Used for 'page not present' events delivered via #PF */
    138	uint32_t flags;
    139
    140	/* Used for 'page ready' events delivered via interrupt notification */
    141	uint32_t token;
    142
    143	uint8_t pad[56];
    144	uint32_t enabled;
    145};
    146
    147#define KVM_PV_EOI_BIT 0
    148#define KVM_PV_EOI_MASK (0x1 << KVM_PV_EOI_BIT)
    149#define KVM_PV_EOI_ENABLED KVM_PV_EOI_MASK
    150#define KVM_PV_EOI_DISABLED 0x0
    151
    152#endif /* _ASM_X86_KVM_PARA_H */