cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

cpu_loop.c (3184B)

      1/*
      2 *  qemu user cpu loop
      3 *
      4 *  Copyright (c) 2003-2008 Fabrice Bellard
      5 *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
      6 *
      7 *  This program is free software; you can redistribute it and/or modify
      8 *  it under the terms of the GNU General Public License as published by
      9 *  the Free Software Foundation; either version 2 of the License, or
     10 *  (at your option) any later version.
     11 *
     12 *  This program is distributed in the hope that it will be useful,
     13 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
     14 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     15 *  GNU General Public License for more details.
     16 *
     17 *  You should have received a copy of the GNU General Public License
     18 *  along with this program; if not, see <http://www.gnu.org/licenses/>.
     19 */
     20
     21#include "qemu/osdep.h"
     22#include "qemu.h"
     23#include "user-internals.h"
     24#include "cpu_loop-common.h"
     25#include "signal-common.h"
     26#include "internal.h"
     27
     28void cpu_loop(CPUHexagonState *env)
     29{
     30    CPUState *cs = env_cpu(env);
     31    int trapnr, signum, sigcode;
     32    target_ulong sigaddr;
     33    target_ulong syscallnum;
     34    target_ulong ret;
     35
     36    for (;;) {
     37        cpu_exec_start(cs);
     38        trapnr = cpu_exec(cs);
     39        cpu_exec_end(cs);
     40        process_queued_cpu_work(cs);
     41
     42        signum = 0;
     43        sigcode = 0;
     44        sigaddr = 0;
     45
     46        switch (trapnr) {
     47        case EXCP_INTERRUPT:
     48            /* just indicate that signals should be handled asap */
     49            break;
     50        case HEX_EXCP_TRAP0:
     51            syscallnum = env->gpr[6];
     52            env->gpr[HEX_REG_PC] += 4;
     53            ret = do_syscall(env,
     54                             syscallnum,
     55                             env->gpr[0],
     56                             env->gpr[1],
     57                             env->gpr[2],
     58                             env->gpr[3],
     59                             env->gpr[4],
     60                             env->gpr[5],
     61                             0, 0);
     62            if (ret == -TARGET_ERESTARTSYS) {
     63                env->gpr[HEX_REG_PC] -= 4;
     64            } else if (ret != -TARGET_QEMU_ESIGRETURN) {
     65                env->gpr[0] = ret;
     66            }
     67            break;
     68        case HEX_EXCP_FETCH_NO_UPAGE:
     69        case HEX_EXCP_PRIV_NO_UREAD:
     70        case HEX_EXCP_PRIV_NO_UWRITE:
     71            signum = TARGET_SIGSEGV;
     72            sigcode = TARGET_SEGV_MAPERR;
     73            break;
     74        case EXCP_ATOMIC:
     75            cpu_exec_step_atomic(cs);
     76            break;
     77        default:
     78            EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
     79                     trapnr);
     80            exit(EXIT_FAILURE);
     81        }
     82
     83        if (signum) {
     84            target_siginfo_t info = {
     85                .si_signo = signum,
     86                .si_errno = 0,
     87                .si_code = sigcode,
     88                ._sifields._sigfault._addr = sigaddr
     89            };
     90            queue_signal(env, info.si_signo, QEMU_SI_KILL, &info);
     91        }
     92
     93        process_pending_signals(env);
     94    }
     95}
     96
     97void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
     98{
     99    env->gpr[HEX_REG_PC] = regs->sepc;
    100    env->gpr[HEX_REG_SP] = regs->sp;
    101    env->gpr[HEX_REG_USR] = 0x56000;
    102}