cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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start.S (2774B)

      1/*
      2 * First stage boot loader for virtio devices. The compiled output goes
      3 * into the pc-bios directory of qemu.
      4 *
      5 * Copyright (c) 2013 Alexander Graf <agraf@suse.de>
      6 * Copyright IBM Corp. 2013, 2017
      7 *
      8 * This work is licensed under the terms of the GNU GPL, version 2 or (at
      9 * your option) any later version. See the COPYING file in the top-level
     10 * directory.
     11 */
     12
     13        .globl _start
     14_start:
     15
     16	larl   %r15, stack + 0x8000	/* Set up stack */
     17
     18	/* clear bss */
     19	larl %r2, __bss_start
     20	larl %r3, _end
     21	slgr %r3, %r2		/* get sizeof bss */
     22	ltgr	%r3,%r3 	/* bss emtpy? */
     23	jz	done
     24	aghi	%r3,-1
     25	srlg	%r4,%r3,8	/* how many 256 byte chunks? */
     26	ltgr	%r4,%r4
     27	lgr	%r1,%r2
     28	jz	remainder
     29loop:
     30	xc	0(256,%r1),0(%r1)
     31	la	%r1,256(%r1)
     32	brctg	%r4,loop
     33remainder:
     34	larl	%r2,memsetxc
     35	ex	%r3,0(%r2)
     36done:
     37        /* set up a pgm exception disabled wait psw */
     38        larl	%r2, disabled_wait_psw
     39        mvc	0x01d0(16), 0(%r2)
     40        j      main		/* And call C */
     41
     42memsetxc:
     43	xc	0(1,%r1),0(%r1)
     44
     45
     46/*
     47 * void disabled_wait(void)
     48 *
     49 * stops the current guest cpu.
     50 */
     51	.globl disabled_wait
     52disabled_wait:
     53	larl	%r1,disabled_wait_psw
     54	lpswe	0(%r1)
     551:	j	1b
     56
     57
     58/*
     59 * void consume_sclp_int(void)
     60 *
     61 * eats one sclp interrupt
     62 */
     63        .globl consume_sclp_int
     64consume_sclp_int:
     65        /* enable service interrupts in cr0 */
     66        stctg   %c0,%c0,0(%r15)
     67        oi      6(%r15),0x2
     68        lctlg   %c0,%c0,0(%r15)
     69        /* prepare external call handler */
     70        larl %r1, external_new_code
     71        stg %r1, 0x1b8
     72        larl %r1, external_new_mask
     73        mvc 0x1b0(8),0(%r1)
     74        /* load enabled wait PSW */
     75        larl %r1, enabled_wait_psw
     76        lpswe 0(%r1)
     77
     78/*
     79 * void consume_io_int(void)
     80 *
     81 * eats one I/O interrupt
     82 */
     83        .globl consume_io_int
     84consume_io_int:
     85        /* enable I/O interrupts in cr6 */
     86        stctg %c6,%c6,0(%r15)
     87        oi    4(%r15), 0xff
     88        lctlg %c6,%c6,0(%r15)
     89        /* prepare i/o call handler */
     90        larl  %r1, io_new_code
     91        stg   %r1, 0x1f8
     92        larl  %r1, io_new_mask
     93        mvc   0x1f0(8),0(%r1)
     94        /* load enabled wait PSW */
     95        larl  %r1, enabled_wait_psw
     96        lpswe 0(%r1)
     97
     98external_new_code:
     99        /* disable service interrupts in cr0 */
    100        stctg   %c0,%c0,0(%r15)
    101        ni      6(%r15),0xfd
    102        lctlg   %c0,%c0,0(%r15)
    103        br      %r14
    104
    105io_new_code:
    106        /* disable I/O interrupts in cr6 */
    107        stctg %c6,%c6,0(%r15)
    108        ni    4(%r15), 0x00
    109        lctlg %c6,%c6,0(%r15)
    110        br    %r14
    111
    112        .align  8
    113disabled_wait_psw:
    114        .quad   0x0002000180000000,0x0000000000000000
    115enabled_wait_psw:
    116        .quad   0x0302000180000000,0x0000000000000000
    117external_new_mask:
    118        .quad   0x0000000180000000
    119io_new_mask:
    120        .quad   0x0000000180000000