cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

mem_helper.c (2203B)

      1/*
      2 *  Helpers for loads and stores
      3 *
      4 *  Copyright (c) 2007 Jocelyn Mayer
      5 *
      6 * This library is free software; you can redistribute it and/or
      7 * modify it under the terms of the GNU Lesser General Public
      8 * License as published by the Free Software Foundation; either
      9 * version 2.1 of the License, or (at your option) any later version.
     10 *
     11 * This library is distributed in the hope that it will be useful,
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     14 * Lesser General Public License for more details.
     15 *
     16 * You should have received a copy of the GNU Lesser General Public
     17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
     18 */
     19
     20#include "qemu/osdep.h"
     21#include "cpu.h"
     22#include "exec/helper-proto.h"
     23#include "exec/exec-all.h"
     24#include "exec/cpu_ldst.h"
     25
     26/* Softmmu support */
     27#ifndef CONFIG_USER_ONLY
     28void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
     29                                   MMUAccessType access_type,
     30                                   int mmu_idx, uintptr_t retaddr)
     31{
     32    AlphaCPU *cpu = ALPHA_CPU(cs);
     33    CPUAlphaState *env = &cpu->env;
     34    uint64_t pc;
     35    uint32_t insn;
     36
     37    cpu_restore_state(cs, retaddr, true);
     38
     39    pc = env->pc;
     40    insn = cpu_ldl_code(env, pc);
     41
     42    env->trap_arg0 = addr;
     43    env->trap_arg1 = insn >> 26;                /* opcode */
     44    env->trap_arg2 = (insn >> 21) & 31;         /* dest regno */
     45    cs->exception_index = EXCP_UNALIGN;
     46    env->error_code = 0;
     47    cpu_loop_exit(cs);
     48}
     49
     50void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
     51                                     vaddr addr, unsigned size,
     52                                     MMUAccessType access_type,
     53                                     int mmu_idx, MemTxAttrs attrs,
     54                                     MemTxResult response, uintptr_t retaddr)
     55{
     56    AlphaCPU *cpu = ALPHA_CPU(cs);
     57    CPUAlphaState *env = &cpu->env;
     58
     59    env->trap_arg0 = addr;
     60    env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0;
     61    cs->exception_index = EXCP_MCHK;
     62    env->error_code = 0;
     63    cpu_loop_exit_restore(cs, retaddr);
     64}
     65#endif /* CONFIG_USER_ONLY */