cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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cpu-param.h (785B)

      1/*
      2 * ARM cpu parameters for qemu.
      3 *
      4 * Copyright (c) 2003 Fabrice Bellard
      5 * SPDX-License-Identifier: LGPL-2.0+
      6 */
      7
      8#ifndef ARM_CPU_PARAM_H
      9#define ARM_CPU_PARAM_H 1
     10
     11#ifdef TARGET_AARCH64
     12# define TARGET_LONG_BITS             64
     13# define TARGET_PHYS_ADDR_SPACE_BITS  48
     14# define TARGET_VIRT_ADDR_SPACE_BITS  48
     15#else
     16# define TARGET_LONG_BITS             32
     17# define TARGET_PHYS_ADDR_SPACE_BITS  40
     18# define TARGET_VIRT_ADDR_SPACE_BITS  32
     19#endif
     20
     21#ifdef CONFIG_USER_ONLY
     22#define TARGET_PAGE_BITS 12
     23# ifdef TARGET_AARCH64
     24#  define TARGET_TAGGED_ADDRESSES
     25# endif
     26#else
     27/*
     28 * ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6
     29 * have to support 1K tiny pages.
     30 */
     31# define TARGET_PAGE_BITS_VARY
     32# define TARGET_PAGE_BITS_MIN  10
     33#endif
     34
     35#define NB_MMU_MODES 15
     36
     37#endif