cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

cpu-internal.h (2609B)

      1/*
      2 * i386 CPU internal definitions to be shared between cpu.c and cpu-sysemu.c
      3 *
      4 *  Copyright (c) 2003 Fabrice Bellard
      5 *
      6 * This library is free software; you can redistribute it and/or
      7 * modify it under the terms of the GNU Lesser General Public
      8 * License as published by the Free Software Foundation; either
      9 * version 2.1 of the License, or (at your option) any later version.
     10 *
     11 * This library is distributed in the hope that it will be useful,
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     14 * Lesser General Public License for more details.
     15 *
     16 * You should have received a copy of the GNU Lesser General Public
     17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
     18 */
     19
     20#ifndef I386_CPU_INTERNAL_H
     21#define I386_CPU_INTERNAL_H
     22
     23typedef enum FeatureWordType {
     24   CPUID_FEATURE_WORD,
     25   MSR_FEATURE_WORD,
     26} FeatureWordType;
     27
     28typedef struct FeatureWordInfo {
     29    FeatureWordType type;
     30    /* feature flags names are taken from "Intel Processor Identification and
     31     * the CPUID Instruction" and AMD's "CPUID Specification".
     32     * In cases of disagreement between feature naming conventions,
     33     * aliases may be added.
     34     */
     35    const char *feat_names[64];
     36    union {
     37        /* If type==CPUID_FEATURE_WORD */
     38        struct {
     39            uint32_t eax;   /* Input EAX for CPUID */
     40            bool needs_ecx; /* CPUID instruction uses ECX as input */
     41            uint32_t ecx;   /* Input ECX value for CPUID */
     42            int reg;        /* output register (R_* constant) */
     43        } cpuid;
     44        /* If type==MSR_FEATURE_WORD */
     45        struct {
     46            uint32_t index;
     47        } msr;
     48    };
     49    uint64_t tcg_features; /* Feature flags supported by TCG */
     50    uint64_t unmigratable_flags; /* Feature flags known to be unmigratable */
     51    uint64_t migratable_flags; /* Feature flags known to be migratable */
     52    /* Features that shouldn't be auto-enabled by "-cpu host" */
     53    uint64_t no_autoenable_flags;
     54} FeatureWordInfo;
     55
     56extern FeatureWordInfo feature_word_info[];
     57
     58void x86_cpu_expand_features(X86CPU *cpu, Error **errp);
     59
     60#ifndef CONFIG_USER_ONLY
     61GuestPanicInformation *x86_cpu_get_crash_info(CPUState *cs);
     62void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v,
     63                                const char *name, void *opaque, Error **errp);
     64
     65void x86_cpu_apic_create(X86CPU *cpu, Error **errp);
     66void x86_cpu_apic_realize(X86CPU *cpu, Error **errp);
     67void x86_cpu_machine_reset_cb(void *opaque);
     68#endif /* !CONFIG_USER_ONLY */
     69
     70#endif /* I386_CPU_INTERNAL_H */