cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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cpu-qom.h (2148B)

      1/*
      2 * QEMU x86 CPU
      3 *
      4 * Copyright (c) 2012 SUSE LINUX Products GmbH
      5 *
      6 * This library is free software; you can redistribute it and/or
      7 * modify it under the terms of the GNU Lesser General Public
      8 * License as published by the Free Software Foundation; either
      9 * version 2.1 of the License, or (at your option) any later version.
     10 *
     11 * This library is distributed in the hope that it will be useful,
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     14 * Lesser General Public License for more details.
     15 *
     16 * You should have received a copy of the GNU Lesser General Public
     17 * License along with this library; if not, see
     18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
     19 */
     20#ifndef QEMU_I386_CPU_QOM_H
     21#define QEMU_I386_CPU_QOM_H
     22
     23#include "hw/core/cpu.h"
     24#include "qemu/notify.h"
     25#include "qom/object.h"
     26
     27#ifdef TARGET_X86_64
     28#define TYPE_X86_CPU "x86_64-cpu"
     29#else
     30#define TYPE_X86_CPU "i386-cpu"
     31#endif
     32
     33OBJECT_DECLARE_TYPE(X86CPU, X86CPUClass,
     34                    X86_CPU)
     35
     36typedef struct X86CPUModel X86CPUModel;
     37
     38/**
     39 * X86CPUClass:
     40 * @cpu_def: CPU model definition
     41 * @host_cpuid_required: Whether CPU model requires cpuid from host.
     42 * @ordering: Ordering on the "-cpu help" CPU model list.
     43 * @migration_safe: See CpuDefinitionInfo::migration_safe
     44 * @static_model: See CpuDefinitionInfo::static
     45 * @parent_realize: The parent class' realize handler.
     46 * @parent_reset: The parent class' reset handler.
     47 *
     48 * An x86 CPU model or family.
     49 */
     50struct X86CPUClass {
     51    /*< private >*/
     52    CPUClass parent_class;
     53    /*< public >*/
     54
     55    /* CPU definition, automatically loaded by instance_init if not NULL.
     56     * Should be eventually replaced by subclass-specific property defaults.
     57     */
     58    X86CPUModel *model;
     59
     60    bool host_cpuid_required;
     61    int ordering;
     62    bool migration_safe;
     63    bool static_model;
     64
     65    /* Optional description of CPU model.
     66     * If unavailable, cpu_def->model_id is used */
     67    const char *model_description;
     68
     69    DeviceRealize parent_realize;
     70    DeviceUnrealize parent_unrealize;
     71    DeviceReset parent_reset;
     72};
     73
     74
     75#endif