cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

helper-tcg.h (3418B)

      1/*
      2 * TCG specific prototypes for helpers
      3 *
      4 *  Copyright (c) 2003 Fabrice Bellard
      5 *
      6 * This library is free software; you can redistribute it and/or
      7 * modify it under the terms of the GNU Lesser General Public
      8 * License as published by the Free Software Foundation; either
      9 * version 2 of the License, or (at your option) any later version.
     10 *
     11 * This library is distributed in the hope that it will be useful,
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     14 * Lesser General Public License for more details.
     15 *
     16 * You should have received a copy of the GNU Lesser General Public
     17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
     18 */
     19
     20#ifndef I386_HELPER_TCG_H
     21#define I386_HELPER_TCG_H
     22
     23#include "exec/exec-all.h"
     24
     25/* Maximum instruction code size */
     26#define TARGET_MAX_INSN_SIZE 16
     27
     28#if defined(TARGET_X86_64)
     29# define TCG_PHYS_ADDR_BITS 40
     30#else
     31# define TCG_PHYS_ADDR_BITS 36
     32#endif
     33
     34QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS);
     35
     36/**
     37 * x86_cpu_do_interrupt:
     38 * @cpu: vCPU the interrupt is to be handled by.
     39 */
     40void x86_cpu_do_interrupt(CPUState *cpu);
     41#ifndef CONFIG_USER_ONLY
     42bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req);
     43#endif
     44
     45/* helper.c */
     46bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     47                      MMUAccessType access_type, int mmu_idx,
     48                      bool probe, uintptr_t retaddr);
     49
     50void breakpoint_handler(CPUState *cs);
     51
     52/* n must be a constant to be efficient */
     53static inline target_long lshift(target_long x, int n)
     54{
     55    if (n >= 0) {
     56        return x << n;
     57    } else {
     58        return x >> (-n);
     59    }
     60}
     61
     62/* translate.c */
     63void tcg_x86_init(void);
     64
     65/* excp_helper.c */
     66void QEMU_NORETURN raise_exception(CPUX86State *env, int exception_index);
     67void QEMU_NORETURN raise_exception_ra(CPUX86State *env, int exception_index,
     68                                      uintptr_t retaddr);
     69void QEMU_NORETURN raise_exception_err(CPUX86State *env, int exception_index,
     70                                       int error_code);
     71void QEMU_NORETURN raise_exception_err_ra(CPUX86State *env, int exception_index,
     72                                          int error_code, uintptr_t retaddr);
     73void QEMU_NORETURN raise_interrupt(CPUX86State *nenv, int intno, int is_int,
     74                                   int error_code, int next_eip_addend);
     75
     76/* cc_helper.c */
     77extern const uint8_t parity_table[256];
     78
     79/* misc_helper.c */
     80void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask);
     81void do_pause(CPUX86State *env) QEMU_NORETURN;
     82
     83/* sysemu/svm_helper.c */
     84#ifndef CONFIG_USER_ONLY
     85void QEMU_NORETURN cpu_vmexit(CPUX86State *nenv, uint32_t exit_code,
     86                              uint64_t exit_info_1, uintptr_t retaddr);
     87void do_vmexit(CPUX86State *env);
     88#endif
     89
     90/* seg_helper.c */
     91void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw);
     92void do_interrupt_all(X86CPU *cpu, int intno, int is_int,
     93                      int error_code, target_ulong next_eip, int is_hw);
     94void handle_even_inj(CPUX86State *env, int intno, int is_int,
     95                     int error_code, int is_hw, int rm);
     96int exception_has_error_code(int intno);
     97
     98/* smm_helper.c */
     99void do_smm_enter(X86CPU *cpu);
    100
    101/* bpt_helper.c */
    102bool check_hw_breakpoints(CPUX86State *env, bool force_dr6_update);
    103
    104#endif /* I386_HELPER_TCG_H */