cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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cpu-qom.h (1310B)

      1/*
      2 * QEMU Motorola 68k CPU
      3 *
      4 * Copyright (c) 2012 SUSE LINUX Products GmbH
      5 *
      6 * This library is free software; you can redistribute it and/or
      7 * modify it under the terms of the GNU Lesser General Public
      8 * License as published by the Free Software Foundation; either
      9 * version 2.1 of the License, or (at your option) any later version.
     10 *
     11 * This library is distributed in the hope that it will be useful,
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     14 * Lesser General Public License for more details.
     15 *
     16 * You should have received a copy of the GNU Lesser General Public
     17 * License along with this library; if not, see
     18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
     19 */
     20#ifndef QEMU_M68K_CPU_QOM_H
     21#define QEMU_M68K_CPU_QOM_H
     22
     23#include "hw/core/cpu.h"
     24#include "qom/object.h"
     25
     26#define TYPE_M68K_CPU "m68k-cpu"
     27
     28OBJECT_DECLARE_TYPE(M68kCPU, M68kCPUClass,
     29                    M68K_CPU)
     30
     31/*
     32 * M68kCPUClass:
     33 * @parent_realize: The parent class' realize handler.
     34 * @parent_reset: The parent class' reset handler.
     35 *
     36 * A Motorola 68k CPU model.
     37 */
     38struct M68kCPUClass {
     39    /*< private >*/
     40    CPUClass parent_class;
     41    /*< public >*/
     42
     43    DeviceRealize parent_realize;
     44    DeviceReset parent_reset;
     45};
     46
     47
     48#endif