cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

monitor.c (2093B)


      1/*
      2 * QEMU monitor for m68k
      3 *
      4 * This work is licensed under the terms of the GNU GPL, version 2 or
      5 * later.  See the COPYING file in the top-level directory.
      6 */
      7
      8#include "qemu/osdep.h"
      9#include "cpu.h"
     10#include "monitor/hmp-target.h"
     11#include "monitor/monitor.h"
     12
     13void hmp_info_tlb(Monitor *mon, const QDict *qdict)
     14{
     15    CPUArchState *env1 = mon_get_cpu_env(mon);
     16
     17    if (!env1) {
     18        monitor_printf(mon, "No CPU available\n");
     19        return;
     20    }
     21
     22    dump_mmu(env1);
     23}
     24
     25static const MonitorDef monitor_defs[] = {
     26    { "d0", offsetof(CPUM68KState, dregs[0]) },
     27    { "d1", offsetof(CPUM68KState, dregs[1]) },
     28    { "d2", offsetof(CPUM68KState, dregs[2]) },
     29    { "d3", offsetof(CPUM68KState, dregs[3]) },
     30    { "d4", offsetof(CPUM68KState, dregs[4]) },
     31    { "d5", offsetof(CPUM68KState, dregs[5]) },
     32    { "d6", offsetof(CPUM68KState, dregs[6]) },
     33    { "d7", offsetof(CPUM68KState, dregs[7]) },
     34    { "a0", offsetof(CPUM68KState, aregs[0]) },
     35    { "a1", offsetof(CPUM68KState, aregs[1]) },
     36    { "a2", offsetof(CPUM68KState, aregs[2]) },
     37    { "a3", offsetof(CPUM68KState, aregs[3]) },
     38    { "a4", offsetof(CPUM68KState, aregs[4]) },
     39    { "a5", offsetof(CPUM68KState, aregs[5]) },
     40    { "a6", offsetof(CPUM68KState, aregs[6]) },
     41    { "a7", offsetof(CPUM68KState, aregs[7]) },
     42    { "pc", offsetof(CPUM68KState, pc) },
     43    { "sr", offsetof(CPUM68KState, sr) },
     44    { "ssp", offsetof(CPUM68KState, sp[0]) },
     45    { "usp", offsetof(CPUM68KState, sp[1]) },
     46    { "isp", offsetof(CPUM68KState, sp[2]) },
     47    { "sfc", offsetof(CPUM68KState, sfc) },
     48    { "dfc", offsetof(CPUM68KState, dfc) },
     49    { "urp", offsetof(CPUM68KState, mmu.urp) },
     50    { "srp", offsetof(CPUM68KState, mmu.srp) },
     51    { "dttr0", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR0]) },
     52    { "dttr1", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR1]) },
     53    { "ittr0", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR0]) },
     54    { "ittr1", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR1]) },
     55    { "mmusr", offsetof(CPUM68KState, mmu.mmusr) },
     56    { NULL },
     57};
     58
     59const MonitorDef *target_monitor_defs(void)
     60{
     61    return monitor_defs;
     62}