cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

translate_addr_const.c (1426B)

      1/*
      2 * Address Computation and Large Constant Instructions
      3 *
      4 *  Copyright (c) 2004-2005 Jocelyn Mayer
      5 *  Copyright (c) 2006 Marius Groeger (FPU operations)
      6 *  Copyright (c) 2006 Thiemo Seufer (MIPS32R2 support)
      7 *  Copyright (c) 2009 CodeSourcery (MIPS16 and microMIPS support)
      8 *  Copyright (c) 2012 Jia Liu & Dongxue Zhang (MIPS ASE DSP support)
      9 *  Copyright (c) 2020 Philippe Mathieu-Daudé
     10 *
     11 * SPDX-License-Identifier: LGPL-2.1-or-later
     12 */
     13#include "qemu/osdep.h"
     14#include "tcg/tcg-op.h"
     15#include "translate.h"
     16
     17bool gen_lsa(DisasContext *ctx, int rd, int rt, int rs, int sa)
     18{
     19    TCGv t0;
     20    TCGv t1;
     21
     22    if (rd == 0) {
     23        /* Treat as NOP. */
     24        return true;
     25    }
     26    t0 = tcg_temp_new();
     27    t1 = tcg_temp_new();
     28    gen_load_gpr(t0, rs);
     29    gen_load_gpr(t1, rt);
     30    tcg_gen_shli_tl(t0, t0, sa + 1);
     31    tcg_gen_add_tl(cpu_gpr[rd], t0, t1);
     32    tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]);
     33
     34    tcg_temp_free(t1);
     35    tcg_temp_free(t0);
     36
     37    return true;
     38}
     39
     40bool gen_dlsa(DisasContext *ctx, int rd, int rt, int rs, int sa)
     41{
     42    TCGv t0;
     43    TCGv t1;
     44
     45    check_mips_64(ctx);
     46
     47    if (rd == 0) {
     48        /* Treat as NOP. */
     49        return true;
     50    }
     51    t0 = tcg_temp_new();
     52    t1 = tcg_temp_new();
     53    gen_load_gpr(t0, rs);
     54    gen_load_gpr(t1, rt);
     55    tcg_gen_shli_tl(t0, t0, sa + 1);
     56    tcg_gen_add_tl(cpu_gpr[rd], t0, t1);
     57    tcg_temp_free(t1);
     58    tcg_temp_free(t0);
     59
     60    return true;
     61}