insn32.decode (39032B)
1# 2# RISC-V translation routines for the RVXI Base Integer Instruction Set. 3# 4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de 5# Bastian Koppelmann, kbastian@mail.uni-paderborn.de 6# 7# This program is free software; you can redistribute it and/or modify it 8# under the terms and conditions of the GNU General Public License, 9# version 2 or later, as published by the Free Software Foundation. 10# 11# This program is distributed in the hope it will be useful, but WITHOUT 12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14# more details. 15# 16# You should have received a copy of the GNU General Public License along with 17# this program. If not, see <http://www.gnu.org/licenses/>. 18 19# Fields: 20%rs3 27:5 21%rs2 20:5 22%rs1 15:5 23%rd 7:5 24%sh5 20:5 25 26%sh7 20:7 27%csr 20:12 28%rm 12:3 29%nf 29:3 !function=ex_plus_1 30 31# immediates: 32%imm_i 20:s12 33%imm_s 25:s7 7:5 34%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 35%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 36%imm_u 12:s20 !function=ex_shift_12 37 38# Argument sets: 39&empty 40&b imm rs2 rs1 41&i imm rs1 rd 42&j imm rd 43&r rd rs1 rs2 44&r2 rd rs1 45&r2_s rs1 rs2 46&s imm rs1 rs2 47&u imm rd 48&shift shamt rs1 rd 49&atomic aq rl rs2 rs1 rd 50&rmrr vm rd rs1 rs2 51&rmr vm rd rs2 52&rwdvm vm wd rd rs1 rs2 53&r2nfvm vm rd rs1 nf 54&rnfvm vm rd rs1 rs2 nf 55 56# Formats 32: 57@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 58@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd 59@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 60@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 61@u .................... ..... ....... &u imm=%imm_u %rd 62@j .................... ..... ....... &j imm=%imm_j %rd 63 64@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd 65@csr ............ ..... ... ..... ....... %csr %rs1 %rd 66 67@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd 68@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd 69 70@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd 71@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd 72@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd 73@r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd 74@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd 75@r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd 76@r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd 77@r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd 78@r2rd ....... ..... ..... ... ..... ....... %rs2 %rd 79@r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd 80@r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd 81@r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd 82@r_wdvm ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd 83@r2_zimm . zimm:11 ..... ... ..... ....... %rs1 %rd 84@r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1 85 86@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 87@hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1 88 89@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 90@sfence_vm ....... ..... ..... ... ..... ....... %rs1 91 92# Formats 64: 93@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd 94 95# *** Privileged Instructions *** 96ecall 000000000000 00000 000 00000 1110011 97ebreak 000000000001 00000 000 00000 1110011 98uret 0000000 00010 00000 000 00000 1110011 99sret 0001000 00010 00000 000 00000 1110011 100mret 0011000 00010 00000 000 00000 1110011 101wfi 0001000 00101 00000 000 00000 1110011 102sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma 103sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm 104 105# *** RV32I Base Instruction Set *** 106lui .................... ..... 0110111 @u 107auipc .................... ..... 0010111 @u 108jal .................... ..... 1101111 @j 109jalr ............ ..... 000 ..... 1100111 @i 110beq ....... ..... ..... 000 ..... 1100011 @b 111bne ....... ..... ..... 001 ..... 1100011 @b 112blt ....... ..... ..... 100 ..... 1100011 @b 113bge ....... ..... ..... 101 ..... 1100011 @b 114bltu ....... ..... ..... 110 ..... 1100011 @b 115bgeu ....... ..... ..... 111 ..... 1100011 @b 116lb ............ ..... 000 ..... 0000011 @i 117lh ............ ..... 001 ..... 0000011 @i 118lw ............ ..... 010 ..... 0000011 @i 119lbu ............ ..... 100 ..... 0000011 @i 120lhu ............ ..... 101 ..... 0000011 @i 121sb ....... ..... ..... 000 ..... 0100011 @s 122sh ....... ..... ..... 001 ..... 0100011 @s 123sw ....... ..... ..... 010 ..... 0100011 @s 124addi ............ ..... 000 ..... 0010011 @i 125slti ............ ..... 010 ..... 0010011 @i 126sltiu ............ ..... 011 ..... 0010011 @i 127xori ............ ..... 100 ..... 0010011 @i 128ori ............ ..... 110 ..... 0010011 @i 129andi ............ ..... 111 ..... 0010011 @i 130slli 00000. ...... ..... 001 ..... 0010011 @sh 131srli 00000. ...... ..... 101 ..... 0010011 @sh 132srai 01000. ...... ..... 101 ..... 0010011 @sh 133add 0000000 ..... ..... 000 ..... 0110011 @r 134sub 0100000 ..... ..... 000 ..... 0110011 @r 135sll 0000000 ..... ..... 001 ..... 0110011 @r 136slt 0000000 ..... ..... 010 ..... 0110011 @r 137sltu 0000000 ..... ..... 011 ..... 0110011 @r 138xor 0000000 ..... ..... 100 ..... 0110011 @r 139srl 0000000 ..... ..... 101 ..... 0110011 @r 140sra 0100000 ..... ..... 101 ..... 0110011 @r 141or 0000000 ..... ..... 110 ..... 0110011 @r 142and 0000000 ..... ..... 111 ..... 0110011 @r 143fence ---- pred:4 succ:4 ----- 000 ----- 0001111 144fence_i ---- ---- ---- ----- 001 ----- 0001111 145csrrw ............ ..... 001 ..... 1110011 @csr 146csrrs ............ ..... 010 ..... 1110011 @csr 147csrrc ............ ..... 011 ..... 1110011 @csr 148csrrwi ............ ..... 101 ..... 1110011 @csr 149csrrsi ............ ..... 110 ..... 1110011 @csr 150csrrci ............ ..... 111 ..... 1110011 @csr 151 152# *** RV64I Base Instruction Set (in addition to RV32I) *** 153lwu ............ ..... 110 ..... 0000011 @i 154ld ............ ..... 011 ..... 0000011 @i 155sd ....... ..... ..... 011 ..... 0100011 @s 156addiw ............ ..... 000 ..... 0011011 @i 157slliw 0000000 ..... ..... 001 ..... 0011011 @sh5 158srliw 0000000 ..... ..... 101 ..... 0011011 @sh5 159sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5 160addw 0000000 ..... ..... 000 ..... 0111011 @r 161subw 0100000 ..... ..... 000 ..... 0111011 @r 162sllw 0000000 ..... ..... 001 ..... 0111011 @r 163srlw 0000000 ..... ..... 101 ..... 0111011 @r 164sraw 0100000 ..... ..... 101 ..... 0111011 @r 165 166# *** RV32M Standard Extension *** 167mul 0000001 ..... ..... 000 ..... 0110011 @r 168mulh 0000001 ..... ..... 001 ..... 0110011 @r 169mulhsu 0000001 ..... ..... 010 ..... 0110011 @r 170mulhu 0000001 ..... ..... 011 ..... 0110011 @r 171div 0000001 ..... ..... 100 ..... 0110011 @r 172divu 0000001 ..... ..... 101 ..... 0110011 @r 173rem 0000001 ..... ..... 110 ..... 0110011 @r 174remu 0000001 ..... ..... 111 ..... 0110011 @r 175 176# *** RV64M Standard Extension (in addition to RV32M) *** 177mulw 0000001 ..... ..... 000 ..... 0111011 @r 178divw 0000001 ..... ..... 100 ..... 0111011 @r 179divuw 0000001 ..... ..... 101 ..... 0111011 @r 180remw 0000001 ..... ..... 110 ..... 0111011 @r 181remuw 0000001 ..... ..... 111 ..... 0111011 @r 182 183# *** RV32A Standard Extension *** 184lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld 185sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st 186amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st 187amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st 188amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st 189amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st 190amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st 191amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st 192amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st 193amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st 194amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st 195 196# *** RV64A Standard Extension (in addition to RV32A) *** 197lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld 198sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st 199amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st 200amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st 201amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st 202amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st 203amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st 204amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st 205amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st 206amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st 207amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st 208 209# *** RV32F Standard Extension *** 210flw ............ ..... 010 ..... 0000111 @i 211fsw ....... ..... ..... 010 ..... 0100111 @s 212fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm 213fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm 214fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm 215fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm 216fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm 217fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm 218fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm 219fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm 220fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm 221fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r 222fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r 223fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r 224fmin_s 0010100 ..... ..... 000 ..... 1010011 @r 225fmax_s 0010100 ..... ..... 001 ..... 1010011 @r 226fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm 227fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm 228fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 229feq_s 1010000 ..... ..... 010 ..... 1010011 @r 230flt_s 1010000 ..... ..... 001 ..... 1010011 @r 231fle_s 1010000 ..... ..... 000 ..... 1010011 @r 232fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 233fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm 234fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm 235fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 236 237# *** RV64F Standard Extension (in addition to RV32F) *** 238fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm 239fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm 240fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm 241fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm 242 243# *** RV32D Standard Extension *** 244fld ............ ..... 011 ..... 0000111 @i 245fsd ....... ..... ..... 011 ..... 0100111 @s 246fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm 247fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm 248fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm 249fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm 250fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm 251fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm 252fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm 253fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm 254fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm 255fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r 256fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r 257fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r 258fmin_d 0010101 ..... ..... 000 ..... 1010011 @r 259fmax_d 0010101 ..... ..... 001 ..... 1010011 @r 260fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm 261fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm 262feq_d 1010001 ..... ..... 010 ..... 1010011 @r 263flt_d 1010001 ..... ..... 001 ..... 1010011 @r 264fle_d 1010001 ..... ..... 000 ..... 1010011 @r 265fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 266fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm 267fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm 268fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm 269fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm 270 271# *** RV64D Standard Extension (in addition to RV32D) *** 272fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm 273fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm 274fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2 275fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm 276fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm 277fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2 278 279# *** RV32H Base Instruction Set *** 280hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2 281hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2 282hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2 283hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2 284hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2 285hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2 286hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2 287hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s 288hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s 289hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s 290hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma 291hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma 292 293# *** RV64H Base Instruction Set *** 294hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2 295hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2 296hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s 297 298# *** Vector loads and stores are encoded within LOADFP/STORE-FP *** 299vlb_v ... 100 . 00000 ..... 000 ..... 0000111 @r2_nfvm 300vlh_v ... 100 . 00000 ..... 101 ..... 0000111 @r2_nfvm 301vlw_v ... 100 . 00000 ..... 110 ..... 0000111 @r2_nfvm 302vle_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm 303vlbu_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm 304vlhu_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm 305vlwu_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm 306vlbff_v ... 100 . 10000 ..... 000 ..... 0000111 @r2_nfvm 307vlhff_v ... 100 . 10000 ..... 101 ..... 0000111 @r2_nfvm 308vlwff_v ... 100 . 10000 ..... 110 ..... 0000111 @r2_nfvm 309vleff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm 310vlbuff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm 311vlhuff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm 312vlwuff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm 313vsb_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm 314vsh_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm 315vsw_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm 316vse_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm 317 318vlsb_v ... 110 . ..... ..... 000 ..... 0000111 @r_nfvm 319vlsh_v ... 110 . ..... ..... 101 ..... 0000111 @r_nfvm 320vlsw_v ... 110 . ..... ..... 110 ..... 0000111 @r_nfvm 321vlse_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm 322vlsbu_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm 323vlshu_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm 324vlswu_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm 325vssb_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm 326vssh_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm 327vssw_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm 328vsse_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm 329 330vlxb_v ... 111 . ..... ..... 000 ..... 0000111 @r_nfvm 331vlxh_v ... 111 . ..... ..... 101 ..... 0000111 @r_nfvm 332vlxw_v ... 111 . ..... ..... 110 ..... 0000111 @r_nfvm 333vlxe_v ... 011 . ..... ..... 111 ..... 0000111 @r_nfvm 334vlxbu_v ... 011 . ..... ..... 000 ..... 0000111 @r_nfvm 335vlxhu_v ... 011 . ..... ..... 101 ..... 0000111 @r_nfvm 336vlxwu_v ... 011 . ..... ..... 110 ..... 0000111 @r_nfvm 337# Vector ordered-indexed and unordered-indexed store insns. 338vsxb_v ... -11 . ..... ..... 000 ..... 0100111 @r_nfvm 339vsxh_v ... -11 . ..... ..... 101 ..... 0100111 @r_nfvm 340vsxw_v ... -11 . ..... ..... 110 ..... 0100111 @r_nfvm 341vsxe_v ... -11 . ..... ..... 111 ..... 0100111 @r_nfvm 342 343#*** Vector AMO operations are encoded under the standard AMO major opcode *** 344vamoswapw_v 00001 . . ..... ..... 110 ..... 0101111 @r_wdvm 345vamoaddw_v 00000 . . ..... ..... 110 ..... 0101111 @r_wdvm 346vamoxorw_v 00100 . . ..... ..... 110 ..... 0101111 @r_wdvm 347vamoandw_v 01100 . . ..... ..... 110 ..... 0101111 @r_wdvm 348vamoorw_v 01000 . . ..... ..... 110 ..... 0101111 @r_wdvm 349vamominw_v 10000 . . ..... ..... 110 ..... 0101111 @r_wdvm 350vamomaxw_v 10100 . . ..... ..... 110 ..... 0101111 @r_wdvm 351vamominuw_v 11000 . . ..... ..... 110 ..... 0101111 @r_wdvm 352vamomaxuw_v 11100 . . ..... ..... 110 ..... 0101111 @r_wdvm 353 354# *** new major opcode OP-V *** 355vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm 356vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm 357vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm 358vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm 359vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm 360vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm 361vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm 362vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm 363vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm 364vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm 365vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm 366vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm 367vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm 368vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm 369vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm 370vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm 371vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm 372vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm 373vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm 374vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm 375vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm 376vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm 377vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm 378vadc_vvm 010000 1 ..... ..... 000 ..... 1010111 @r_vm_1 379vadc_vxm 010000 1 ..... ..... 100 ..... 1010111 @r_vm_1 380vadc_vim 010000 1 ..... ..... 011 ..... 1010111 @r_vm_1 381vmadc_vvm 010001 1 ..... ..... 000 ..... 1010111 @r_vm_1 382vmadc_vxm 010001 1 ..... ..... 100 ..... 1010111 @r_vm_1 383vmadc_vim 010001 1 ..... ..... 011 ..... 1010111 @r_vm_1 384vsbc_vvm 010010 1 ..... ..... 000 ..... 1010111 @r_vm_1 385vsbc_vxm 010010 1 ..... ..... 100 ..... 1010111 @r_vm_1 386vmsbc_vvm 010011 1 ..... ..... 000 ..... 1010111 @r_vm_1 387vmsbc_vxm 010011 1 ..... ..... 100 ..... 1010111 @r_vm_1 388vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm 389vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm 390vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm 391vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm 392vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm 393vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm 394vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm 395vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm 396vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm 397vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm 398vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm 399vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm 400vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm 401vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm 402vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm 403vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm 404vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm 405vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm 406vnsrl_vv 101100 . ..... ..... 000 ..... 1010111 @r_vm 407vnsrl_vx 101100 . ..... ..... 100 ..... 1010111 @r_vm 408vnsrl_vi 101100 . ..... ..... 011 ..... 1010111 @r_vm 409vnsra_vv 101101 . ..... ..... 000 ..... 1010111 @r_vm 410vnsra_vx 101101 . ..... ..... 100 ..... 1010111 @r_vm 411vnsra_vi 101101 . ..... ..... 011 ..... 1010111 @r_vm 412vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm 413vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm 414vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm 415vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm 416vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm 417vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm 418vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm 419vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm 420vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm 421vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm 422vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm 423vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm 424vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm 425vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm 426vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm 427vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm 428vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm 429vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm 430vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm 431vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm 432vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm 433vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm 434vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm 435vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm 436vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm 437vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm 438vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm 439vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm 440vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm 441vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm 442vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm 443vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm 444vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm 445vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm 446vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm 447vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm 448vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm 449vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm 450vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm 451vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm 452vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm 453vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm 454vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm 455vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm 456vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm 457vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm 458vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm 459vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm 460vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm 461vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm 462vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm 463vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm 464vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm 465vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm 466vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm 467vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm 468vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm 469vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm 470vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm 471vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm 472vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm 473vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm 474vwmaccsu_vv 111110 . ..... ..... 010 ..... 1010111 @r_vm 475vwmaccsu_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm 476vwmaccus_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm 477vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2 478vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2 479vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2 480vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0 481vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0 482vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0 483vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm 484vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm 485vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm 486vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm 487vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm 488vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm 489vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm 490vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm 491vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm 492vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm 493vaadd_vv 100100 . ..... ..... 000 ..... 1010111 @r_vm 494vaadd_vx 100100 . ..... ..... 100 ..... 1010111 @r_vm 495vaadd_vi 100100 . ..... ..... 011 ..... 1010111 @r_vm 496vasub_vv 100110 . ..... ..... 000 ..... 1010111 @r_vm 497vasub_vx 100110 . ..... ..... 100 ..... 1010111 @r_vm 498vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm 499vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm 500vwsmaccu_vv 111100 . ..... ..... 000 ..... 1010111 @r_vm 501vwsmaccu_vx 111100 . ..... ..... 100 ..... 1010111 @r_vm 502vwsmacc_vv 111101 . ..... ..... 000 ..... 1010111 @r_vm 503vwsmacc_vx 111101 . ..... ..... 100 ..... 1010111 @r_vm 504vwsmaccsu_vv 111110 . ..... ..... 000 ..... 1010111 @r_vm 505vwsmaccsu_vx 111110 . ..... ..... 100 ..... 1010111 @r_vm 506vwsmaccus_vx 111111 . ..... ..... 100 ..... 1010111 @r_vm 507vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm 508vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm 509vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm 510vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm 511vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm 512vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm 513vnclipu_vv 101110 . ..... ..... 000 ..... 1010111 @r_vm 514vnclipu_vx 101110 . ..... ..... 100 ..... 1010111 @r_vm 515vnclipu_vi 101110 . ..... ..... 011 ..... 1010111 @r_vm 516vnclip_vv 101111 . ..... ..... 000 ..... 1010111 @r_vm 517vnclip_vx 101111 . ..... ..... 100 ..... 1010111 @r_vm 518vnclip_vi 101111 . ..... ..... 011 ..... 1010111 @r_vm 519vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm 520vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm 521vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm 522vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm 523vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm 524vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm 525vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm 526vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm 527vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm 528vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm 529vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm 530vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm 531vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm 532vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm 533vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm 534vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm 535vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm 536vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm 537vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm 538vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm 539vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm 540vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm 541vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm 542vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm 543vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm 544vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm 545vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm 546vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm 547vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm 548vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm 549vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm 550vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm 551vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm 552vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm 553vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm 554vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm 555vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm 556vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm 557vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm 558vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm 559vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm 560vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm 561vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm 562vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm 563vfsqrt_v 100011 . ..... 00000 001 ..... 1010111 @r2_vm 564vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm 565vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm 566vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm 567vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm 568vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm 569vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm 570vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm 571vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm 572vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm 573vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm 574vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm 575vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm 576vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm 577vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm 578vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm 579vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm 580vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm 581vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm 582vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm 583vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm 584vmford_vv 011010 . ..... ..... 001 ..... 1010111 @r_vm 585vmford_vf 011010 . ..... ..... 101 ..... 1010111 @r_vm 586vfclass_v 100011 . ..... 10000 001 ..... 1010111 @r2_vm 587vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0 588vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2 589vfcvt_xu_f_v 100010 . ..... 00000 001 ..... 1010111 @r2_vm 590vfcvt_x_f_v 100010 . ..... 00001 001 ..... 1010111 @r2_vm 591vfcvt_f_xu_v 100010 . ..... 00010 001 ..... 1010111 @r2_vm 592vfcvt_f_x_v 100010 . ..... 00011 001 ..... 1010111 @r2_vm 593vfwcvt_xu_f_v 100010 . ..... 01000 001 ..... 1010111 @r2_vm 594vfwcvt_x_f_v 100010 . ..... 01001 001 ..... 1010111 @r2_vm 595vfwcvt_f_xu_v 100010 . ..... 01010 001 ..... 1010111 @r2_vm 596vfwcvt_f_x_v 100010 . ..... 01011 001 ..... 1010111 @r2_vm 597vfwcvt_f_f_v 100010 . ..... 01100 001 ..... 1010111 @r2_vm 598vfncvt_xu_f_v 100010 . ..... 10000 001 ..... 1010111 @r2_vm 599vfncvt_x_f_v 100010 . ..... 10001 001 ..... 1010111 @r2_vm 600vfncvt_f_xu_v 100010 . ..... 10010 001 ..... 1010111 @r2_vm 601vfncvt_f_x_v 100010 . ..... 10011 001 ..... 1010111 @r2_vm 602vfncvt_f_f_v 100010 . ..... 10100 001 ..... 1010111 @r2_vm 603vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm 604vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm 605vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm 606vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm 607vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm 608vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm 609vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm 610vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm 611vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm 612vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm 613# Vector ordered and unordered reduction sum 614vfredsum_vs 0000-1 . ..... ..... 001 ..... 1010111 @r_vm 615vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm 616vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm 617# Vector widening ordered and unordered float reduction sum 618vfwredsum_vs 1100-1 . ..... ..... 001 ..... 1010111 @r_vm 619vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r 620vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r 621vmandnot_mm 011000 - ..... ..... 010 ..... 1010111 @r 622vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r 623vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r 624vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r 625vmornot_mm 011100 - ..... ..... 010 ..... 1010111 @r 626vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r 627vmpopc_m 010100 . ..... ----- 010 ..... 1010111 @r2_vm 628vmfirst_m 010101 . ..... ----- 010 ..... 1010111 @r2_vm 629vmsbf_m 010110 . ..... 00001 010 ..... 1010111 @r2_vm 630vmsif_m 010110 . ..... 00011 010 ..... 1010111 @r2_vm 631vmsof_m 010110 . ..... 00010 010 ..... 1010111 @r2_vm 632viota_m 010110 . ..... 10000 010 ..... 1010111 @r2_vm 633vid_v 010110 . 00000 10001 010 ..... 1010111 @r1_vm 634vext_x_v 001100 1 ..... ..... 010 ..... 1010111 @r 635vmv_s_x 001101 1 00000 ..... 110 ..... 1010111 @r2 636vfmv_f_s 001100 1 ..... 00000 001 ..... 1010111 @r2rd 637vfmv_s_f 001101 1 00000 ..... 101 ..... 1010111 @r2 638vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm 639vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm 640vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm 641vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm 642vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm 643vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm 644vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm 645vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm 646vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm 647vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r 648 649vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm 650vsetvl 1000000 ..... ..... 111 ..... 1010111 @r 651 652#*** Vector AMO operations (in addition to Zvamo) *** 653vamoswapd_v 00001 . . ..... ..... 111 ..... 0101111 @r_wdvm 654vamoaddd_v 00000 . . ..... ..... 111 ..... 0101111 @r_wdvm 655vamoxord_v 00100 . . ..... ..... 111 ..... 0101111 @r_wdvm 656vamoandd_v 01100 . . ..... ..... 111 ..... 0101111 @r_wdvm 657vamoord_v 01000 . . ..... ..... 111 ..... 0101111 @r_wdvm 658vamomind_v 10000 . . ..... ..... 111 ..... 0101111 @r_wdvm 659vamomaxd_v 10100 . . ..... ..... 111 ..... 0101111 @r_wdvm 660vamominud_v 11000 . . ..... ..... 111 ..... 0101111 @r_wdvm 661vamomaxud_v 11100 . . ..... ..... 111 ..... 0101111 @r_wdvm 662 663# *** RV32 Zba Standard Extension *** 664sh1add 0010000 .......... 010 ..... 0110011 @r 665sh2add 0010000 .......... 100 ..... 0110011 @r 666sh3add 0010000 .......... 110 ..... 0110011 @r 667 668# *** RV64 Zba Standard Extension (in addition to RV32 Zba) *** 669add_uw 0000100 .......... 000 ..... 0111011 @r 670sh1add_uw 0010000 .......... 010 ..... 0111011 @r 671sh2add_uw 0010000 .......... 100 ..... 0111011 @r 672sh3add_uw 0010000 .......... 110 ..... 0111011 @r 673slli_uw 00001 ............ 001 ..... 0011011 @sh 674 675# *** RV32 Zbb Standard Extension *** 676andn 0100000 .......... 111 ..... 0110011 @r 677clz 011000 000000 ..... 001 ..... 0010011 @r2 678cpop 011000 000010 ..... 001 ..... 0010011 @r2 679ctz 011000 000001 ..... 001 ..... 0010011 @r2 680max 0000101 .......... 110 ..... 0110011 @r 681maxu 0000101 .......... 111 ..... 0110011 @r 682min 0000101 .......... 100 ..... 0110011 @r 683minu 0000101 .......... 101 ..... 0110011 @r 684orc_b 001010 000111 ..... 101 ..... 0010011 @r2 685orn 0100000 .......... 110 ..... 0110011 @r 686# The encoding for rev8 differs between RV32 and RV64. 687# rev8_32 denotes the RV32 variant. 688rev8_32 011010 011000 ..... 101 ..... 0010011 @r2 689rol 0110000 .......... 001 ..... 0110011 @r 690ror 0110000 .......... 101 ..... 0110011 @r 691rori 01100 ............ 101 ..... 0010011 @sh 692sext_b 011000 000100 ..... 001 ..... 0010011 @r2 693sext_h 011000 000101 ..... 001 ..... 0010011 @r2 694xnor 0100000 .......... 100 ..... 0110011 @r 695# The encoding for zext.h differs between RV32 and RV64. 696# zext_h_32 denotes the RV32 variant. 697zext_h_32 0000100 00000 ..... 100 ..... 0110011 @r2 698 699# *** RV64 Zbb Standard Extension (in addition to RV32 Zbb) *** 700clzw 0110000 00000 ..... 001 ..... 0011011 @r2 701ctzw 0110000 00001 ..... 001 ..... 0011011 @r2 702cpopw 0110000 00010 ..... 001 ..... 0011011 @r2 703# The encoding for rev8 differs between RV32 and RV64. 704# When executing on RV64, the encoding used in RV32 is an illegal 705# instruction, so we use different handler functions to differentiate. 706rev8_64 011010 111000 ..... 101 ..... 0010011 @r2 707rolw 0110000 .......... 001 ..... 0111011 @r 708roriw 0110000 .......... 101 ..... 0011011 @sh5 709rorw 0110000 .......... 101 ..... 0111011 @r 710# The encoding for zext.h differs between RV32 and RV64. 711# When executing on RV64, the encoding used in RV32 is an illegal 712# instruction, so we use different handler functions to differentiate. 713zext_h_64 0000100 00000 ..... 100 ..... 0111011 @r2 714 715# *** RV32 Zbc Standard Extension *** 716clmul 0000101 .......... 001 ..... 0110011 @r 717clmulh 0000101 .......... 011 ..... 0110011 @r 718clmulr 0000101 .......... 010 ..... 0110011 @r 719 720# *** RV32 Zbs Standard Extension *** 721bclr 0100100 .......... 001 ..... 0110011 @r 722bclri 01001. ........... 001 ..... 0010011 @sh 723bext 0100100 .......... 101 ..... 0110011 @r 724bexti 01001. ........... 101 ..... 0010011 @sh 725binv 0110100 .......... 001 ..... 0110011 @r 726binvi 01101. ........... 001 ..... 0010011 @sh 727bset 0010100 .......... 001 ..... 0110011 @r 728bseti 00101. ........... 001 ..... 0010011 @sh