cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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tcg-target-con-str.h (560B)

      1/* SPDX-License-Identifier: MIT */
      2/*
      3 * Define MIPS target-specific operand constraints.
      4 * Copyright (c) 2021 Linaro
      5 */
      6
      7/*
      8 * Define constraint letters for register sets:
      9 * REGS(letter, register_mask)
     10 */
     11REGS('r', ALL_GENERAL_REGS)
     12REGS('L', ALL_QLOAD_REGS)
     13REGS('S', ALL_QSTORE_REGS)
     14
     15/*
     16 * Define constraint letters for constants:
     17 * CONST(letter, TCG_CT_CONST_* bit set)
     18 */
     19CONST('I', TCG_CT_CONST_U16)
     20CONST('J', TCG_CT_CONST_S16)
     21CONST('K', TCG_CT_CONST_P2M1)
     22CONST('N', TCG_CT_CONST_N16)
     23CONST('W', TCG_CT_CONST_WSZ)
     24CONST('Z', TCG_CT_CONST_ZERO)