cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

sdhci-test.c (2998B)

      1/*
      2 * QTest testcase for SDHCI controllers
      3 *
      4 * Written by Philippe Mathieu-Daudé <f4bug@amsat.org>
      5 *
      6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
      7 * See the COPYING file in the top-level directory.
      8 * SPDX-License-Identifier: GPL-2.0-or-later
      9 */
     10
     11#include "qemu/osdep.h"
     12#include "hw/registerfields.h"
     13#include "libqos/libqtest.h"
     14#include "qemu/module.h"
     15#include "libqos/pci-pc.h"
     16#include "hw/pci/pci.h"
     17#include "libqos/qgraph.h"
     18#include "libqos/sdhci.h"
     19
     20#define SDHC_CAPAB                      0x40
     21FIELD(SDHC_CAPAB, BASECLKFREQ,               8, 8); /* since v2 */
     22FIELD(SDHC_CAPAB, SDMA,                     22, 1);
     23FIELD(SDHC_CAPAB, SDR,                      32, 3); /* since v3 */
     24FIELD(SDHC_CAPAB, DRIVER,                   36, 3); /* since v3 */
     25#define SDHC_HCVER                      0xFE
     26
     27static void check_specs_version(QSDHCI *s, uint8_t version)
     28{
     29    uint32_t v;
     30
     31    v = s->readw(s, SDHC_HCVER);
     32    v &= 0xff;
     33    v += 1;
     34    g_assert_cmpuint(v, ==, version);
     35}
     36
     37static void check_capab_capareg(QSDHCI *s, uint64_t expec_capab)
     38{
     39    uint64_t capab;
     40
     41    capab = s->readq(s, SDHC_CAPAB);
     42    g_assert_cmphex(capab, ==, expec_capab);
     43}
     44
     45static void check_capab_readonly(QSDHCI *s)
     46{
     47    const uint64_t vrand = 0x123456789abcdef;
     48    uint64_t capab0, capab1;
     49
     50    capab0 = s->readq(s, SDHC_CAPAB);
     51    g_assert_cmpuint(capab0, !=, vrand);
     52
     53    s->writeq(s, SDHC_CAPAB, vrand);
     54    capab1 = s->readq(s, SDHC_CAPAB);
     55    g_assert_cmpuint(capab1, !=, vrand);
     56    g_assert_cmpuint(capab1, ==, capab0);
     57}
     58
     59static void check_capab_baseclock(QSDHCI *s, uint8_t expec_freq)
     60{
     61    uint64_t capab, capab_freq;
     62
     63    if (!expec_freq) {
     64        return;
     65    }
     66    capab = s->readq(s, SDHC_CAPAB);
     67    capab_freq = FIELD_EX64(capab, SDHC_CAPAB, BASECLKFREQ);
     68    g_assert_cmpuint(capab_freq, ==, expec_freq);
     69}
     70
     71static void check_capab_sdma(QSDHCI *s, bool supported)
     72{
     73    uint64_t capab, capab_sdma;
     74
     75    capab = s->readq(s, SDHC_CAPAB);
     76    capab_sdma = FIELD_EX64(capab, SDHC_CAPAB, SDMA);
     77    g_assert_cmpuint(capab_sdma, ==, supported);
     78}
     79
     80static void check_capab_v3(QSDHCI *s, uint8_t version)
     81{
     82    uint64_t capab, capab_v3;
     83
     84    if (version < 3) {
     85        /* before v3 those fields are RESERVED */
     86        capab = s->readq(s, SDHC_CAPAB);
     87        capab_v3 = FIELD_EX64(capab, SDHC_CAPAB, SDR);
     88        g_assert_cmpuint(capab_v3, ==, 0);
     89        capab_v3 = FIELD_EX64(capab, SDHC_CAPAB, DRIVER);
     90        g_assert_cmpuint(capab_v3, ==, 0);
     91    }
     92}
     93
     94static void test_registers(void *obj, void *data, QGuestAllocator *alloc)
     95{
     96    QSDHCI *s = obj;
     97
     98    check_specs_version(s, s->props.version);
     99    check_capab_capareg(s, s->props.capab.reg);
    100    check_capab_readonly(s);
    101    check_capab_v3(s, s->props.version);
    102    check_capab_sdma(s, s->props.capab.sdma);
    103    check_capab_baseclock(s, s->props.baseclock);
    104}
    105
    106static void register_sdhci_test(void)
    107{
    108    qos_add_test("registers", "sdhci", test_registers, NULL);
    109}
    110
    111libqos_init(register_sdhci_test);