cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

test-i386-sse-exceptions.c (28316B)

      1/* Test SSE exceptions.  */
      2
      3#include <float.h>
      4#include <stdint.h>
      5#include <stdio.h>
      6
      7volatile float f_res;
      8volatile double d_res;
      9
     10volatile float f_snan = __builtin_nansf("");
     11volatile float f_half = 0.5f;
     12volatile float f_third = 1.0f / 3.0f;
     13volatile float f_nan = __builtin_nanl("");
     14volatile float f_inf = __builtin_inff();
     15volatile float f_ninf = -__builtin_inff();
     16volatile float f_one = 1.0f;
     17volatile float f_two = 2.0f;
     18volatile float f_zero = 0.0f;
     19volatile float f_nzero = -0.0f;
     20volatile float f_min = FLT_MIN;
     21volatile float f_true_min = 0x1p-149f;
     22volatile float f_max = FLT_MAX;
     23volatile float f_nmax = -FLT_MAX;
     24
     25volatile double d_snan = __builtin_nans("");
     26volatile double d_half = 0.5;
     27volatile double d_third = 1.0 / 3.0;
     28volatile double d_nan = __builtin_nan("");
     29volatile double d_inf = __builtin_inf();
     30volatile double d_ninf = -__builtin_inf();
     31volatile double d_one = 1.0;
     32volatile double d_two = 2.0;
     33volatile double d_zero = 0.0;
     34volatile double d_nzero = -0.0;
     35volatile double d_min = DBL_MIN;
     36volatile double d_true_min = 0x1p-1074;
     37volatile double d_max = DBL_MAX;
     38volatile double d_nmax = -DBL_MAX;
     39
     40volatile int32_t i32_max = INT32_MAX;
     41
     42#define IE (1 << 0)
     43#define ZE (1 << 2)
     44#define OE (1 << 3)
     45#define UE (1 << 4)
     46#define PE (1 << 5)
     47#define EXC (IE | ZE | OE | UE | PE)
     48
     49uint32_t mxcsr_default = 0x1f80;
     50uint32_t mxcsr_ftz = 0x9f80;
     51
     52int main(void)
     53{
     54    uint32_t mxcsr;
     55    int32_t i32_res;
     56    int ret = 0;
     57
     58    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
     59    d_res = f_snan;
     60    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
     61    if ((mxcsr & EXC) != IE) {
     62        printf("FAIL: widen float snan\n");
     63        ret = 1;
     64    }
     65
     66    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
     67    f_res = d_min;
     68    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
     69    if ((mxcsr & EXC) != (UE | PE)) {
     70        printf("FAIL: narrow float underflow\n");
     71        ret = 1;
     72    }
     73
     74    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
     75    f_res = d_max;
     76    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
     77    if ((mxcsr & EXC) != (OE | PE)) {
     78        printf("FAIL: narrow float overflow\n");
     79        ret = 1;
     80    }
     81
     82    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
     83    f_res = d_third;
     84    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
     85    if ((mxcsr & EXC) != PE) {
     86        printf("FAIL: narrow float inexact\n");
     87        ret = 1;
     88    }
     89
     90    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
     91    f_res = d_snan;
     92    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
     93    if ((mxcsr & EXC) != IE) {
     94        printf("FAIL: narrow float snan\n");
     95        ret = 1;
     96    }
     97
     98    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
     99    __asm__ volatile ("roundss $4, %0, %0" : "=x" (f_res) : "0" (f_min));
    100    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    101    if ((mxcsr & EXC) != PE) {
    102        printf("FAIL: roundss min\n");
    103        ret = 1;
    104    }
    105    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    106    __asm__ volatile ("roundss $12, %0, %0" : "=x" (f_res) : "0" (f_min));
    107    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    108    if ((mxcsr & EXC) != 0) {
    109        printf("FAIL: roundss no-inexact min\n");
    110        ret = 1;
    111    }
    112    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    113    __asm__ volatile ("roundss $4, %0, %0" : "=x" (f_res) : "0" (f_snan));
    114    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    115    if ((mxcsr & EXC) != IE) {
    116        printf("FAIL: roundss snan\n");
    117        ret = 1;
    118    }
    119    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    120    __asm__ volatile ("roundss $12, %0, %0" : "=x" (f_res) : "0" (f_snan));
    121    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    122    if ((mxcsr & EXC) != IE) {
    123        printf("FAIL: roundss no-inexact snan\n");
    124        ret = 1;
    125    }
    126
    127    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    128    __asm__ volatile ("roundsd $4, %0, %0" : "=x" (d_res) : "0" (d_min));
    129    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    130    if ((mxcsr & EXC) != PE) {
    131        printf("FAIL: roundsd min\n");
    132        ret = 1;
    133    }
    134    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    135    __asm__ volatile ("roundsd $12, %0, %0" : "=x" (d_res) : "0" (d_min));
    136    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    137    if ((mxcsr & EXC) != 0) {
    138        printf("FAIL: roundsd no-inexact min\n");
    139        ret = 1;
    140    }
    141    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    142    __asm__ volatile ("roundsd $4, %0, %0" : "=x" (d_res) : "0" (d_snan));
    143    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    144    if ((mxcsr & EXC) != IE) {
    145        printf("FAIL: roundsd snan\n");
    146        ret = 1;
    147    }
    148    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    149    __asm__ volatile ("roundsd $12, %0, %0" : "=x" (d_res) : "0" (d_snan));
    150    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    151    if ((mxcsr & EXC) != IE) {
    152        printf("FAIL: roundsd no-inexact snan\n");
    153        ret = 1;
    154    }
    155
    156    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    157    __asm__ volatile ("comiss %1, %0" : : "x" (f_nan), "x" (f_zero));
    158    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    159    if ((mxcsr & EXC) != IE) {
    160        printf("FAIL: comiss nan\n");
    161        ret = 1;
    162    }
    163    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    164    __asm__ volatile ("ucomiss %1, %0" : : "x" (f_nan), "x" (f_zero));
    165    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    166    if ((mxcsr & EXC) != 0) {
    167        printf("FAIL: ucomiss nan\n");
    168        ret = 1;
    169    }
    170    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    171    __asm__ volatile ("ucomiss %1, %0" : : "x" (f_snan), "x" (f_zero));
    172    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    173    if ((mxcsr & EXC) != IE) {
    174        printf("FAIL: ucomiss snan\n");
    175        ret = 1;
    176    }
    177
    178    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    179    __asm__ volatile ("comisd %1, %0" : : "x" (d_nan), "x" (d_zero));
    180    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    181    if ((mxcsr & EXC) != IE) {
    182        printf("FAIL: comisd nan\n");
    183        ret = 1;
    184    }
    185    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    186    __asm__ volatile ("ucomisd %1, %0" : : "x" (d_nan), "x" (d_zero));
    187    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    188    if ((mxcsr & EXC) != 0) {
    189        printf("FAIL: ucomisd nan\n");
    190        ret = 1;
    191    }
    192    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    193    __asm__ volatile ("ucomisd %1, %0" : : "x" (d_snan), "x" (d_zero));
    194    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    195    if ((mxcsr & EXC) != IE) {
    196        printf("FAIL: ucomisd snan\n");
    197        ret = 1;
    198    }
    199
    200    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    201    f_res = f_max + f_max;
    202    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    203    if ((mxcsr & EXC) != (OE | PE)) {
    204        printf("FAIL: float add overflow\n");
    205        ret = 1;
    206    }
    207    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    208    f_res = f_max + f_min;
    209    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    210    if ((mxcsr & EXC) != PE) {
    211        printf("FAIL: float add inexact\n");
    212        ret = 1;
    213    }
    214    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    215    f_res = f_inf + f_ninf;
    216    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    217    if ((mxcsr & EXC) != IE) {
    218        printf("FAIL: float add inf -inf\n");
    219        ret = 1;
    220    }
    221    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    222    f_res = f_snan + f_third;
    223    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    224    if ((mxcsr & EXC) != IE) {
    225        printf("FAIL: float add snan\n");
    226        ret = 1;
    227    }
    228    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
    229    f_res = f_true_min + f_true_min;
    230    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    231    if ((mxcsr & EXC) != (UE | PE)) {
    232        printf("FAIL: float add FTZ underflow\n");
    233        ret = 1;
    234    }
    235
    236    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    237    d_res = d_max + d_max;
    238    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    239    if ((mxcsr & EXC) != (OE | PE)) {
    240        printf("FAIL: double add overflow\n");
    241        ret = 1;
    242    }
    243    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    244    d_res = d_max + d_min;
    245    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    246    if ((mxcsr & EXC) != PE) {
    247        printf("FAIL: double add inexact\n");
    248        ret = 1;
    249    }
    250    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    251    d_res = d_inf + d_ninf;
    252    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    253    if ((mxcsr & EXC) != IE) {
    254        printf("FAIL: double add inf -inf\n");
    255        ret = 1;
    256    }
    257    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    258    d_res = d_snan + d_third;
    259    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    260    if ((mxcsr & EXC) != IE) {
    261        printf("FAIL: double add snan\n");
    262        ret = 1;
    263    }
    264    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
    265    d_res = d_true_min + d_true_min;
    266    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    267    if ((mxcsr & EXC) != (UE | PE)) {
    268        printf("FAIL: double add FTZ underflow\n");
    269        ret = 1;
    270    }
    271
    272    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    273    f_res = f_max - f_nmax;
    274    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    275    if ((mxcsr & EXC) != (OE | PE)) {
    276        printf("FAIL: float sub overflow\n");
    277        ret = 1;
    278    }
    279    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    280    f_res = f_max - f_min;
    281    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    282    if ((mxcsr & EXC) != PE) {
    283        printf("FAIL: float sub inexact\n");
    284        ret = 1;
    285    }
    286    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    287    f_res = f_inf - f_inf;
    288    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    289    if ((mxcsr & EXC) != IE) {
    290        printf("FAIL: float sub inf inf\n");
    291        ret = 1;
    292    }
    293    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    294    f_res = f_snan - f_third;
    295    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    296    if ((mxcsr & EXC) != IE) {
    297        printf("FAIL: float sub snan\n");
    298        ret = 1;
    299    }
    300    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
    301    f_res = f_min - f_true_min;
    302    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    303    if ((mxcsr & EXC) != (UE | PE)) {
    304        printf("FAIL: float sub FTZ underflow\n");
    305        ret = 1;
    306    }
    307
    308    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    309    d_res = d_max - d_nmax;
    310    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    311    if ((mxcsr & EXC) != (OE | PE)) {
    312        printf("FAIL: double sub overflow\n");
    313        ret = 1;
    314    }
    315    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    316    d_res = d_max - d_min;
    317    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    318    if ((mxcsr & EXC) != PE) {
    319        printf("FAIL: double sub inexact\n");
    320        ret = 1;
    321    }
    322    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    323    d_res = d_inf - d_inf;
    324    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    325    if ((mxcsr & EXC) != IE) {
    326        printf("FAIL: double sub inf inf\n");
    327        ret = 1;
    328    }
    329    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    330    d_res = d_snan - d_third;
    331    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    332    if ((mxcsr & EXC) != IE) {
    333        printf("FAIL: double sub snan\n");
    334        ret = 1;
    335    }
    336    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
    337    d_res = d_min - d_true_min;
    338    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    339    if ((mxcsr & EXC) != (UE | PE)) {
    340        printf("FAIL: double sub FTZ underflow\n");
    341        ret = 1;
    342    }
    343
    344    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    345    f_res = f_max * f_max;
    346    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    347    if ((mxcsr & EXC) != (OE | PE)) {
    348        printf("FAIL: float mul overflow\n");
    349        ret = 1;
    350    }
    351    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    352    f_res = f_third * f_third;
    353    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    354    if ((mxcsr & EXC) != PE) {
    355        printf("FAIL: float mul inexact\n");
    356        ret = 1;
    357    }
    358    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    359    f_res = f_min * f_min;
    360    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    361    if ((mxcsr & EXC) != (UE | PE)) {
    362        printf("FAIL: float mul underflow\n");
    363        ret = 1;
    364    }
    365    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    366    f_res = f_inf * f_zero;
    367    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    368    if ((mxcsr & EXC) != IE) {
    369        printf("FAIL: float mul inf 0\n");
    370        ret = 1;
    371    }
    372    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    373    f_res = f_snan * f_third;
    374    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    375    if ((mxcsr & EXC) != IE) {
    376        printf("FAIL: float mul snan\n");
    377        ret = 1;
    378    }
    379    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
    380    f_res = f_min * f_half;
    381    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    382    if ((mxcsr & EXC) != (UE | PE)) {
    383        printf("FAIL: float mul FTZ underflow\n");
    384        ret = 1;
    385    }
    386
    387    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    388    d_res = d_max * d_max;
    389    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    390    if ((mxcsr & EXC) != (OE | PE)) {
    391        printf("FAIL: double mul overflow\n");
    392        ret = 1;
    393    }
    394    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    395    d_res = d_third * d_third;
    396    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    397    if ((mxcsr & EXC) != PE) {
    398        printf("FAIL: double mul inexact\n");
    399        ret = 1;
    400    }
    401    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    402    d_res = d_min * d_min;
    403    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    404    if ((mxcsr & EXC) != (UE | PE)) {
    405        printf("FAIL: double mul underflow\n");
    406        ret = 1;
    407    }
    408    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    409    d_res = d_inf * d_zero;
    410    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    411    if ((mxcsr & EXC) != IE) {
    412        printf("FAIL: double mul inf 0\n");
    413        ret = 1;
    414    }
    415    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    416    d_res = d_snan * d_third;
    417    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    418    if ((mxcsr & EXC) != IE) {
    419        printf("FAIL: double mul snan\n");
    420        ret = 1;
    421    }
    422    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
    423    d_res = d_min * d_half;
    424    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    425    if ((mxcsr & EXC) != (UE | PE)) {
    426        printf("FAIL: double mul FTZ underflow\n");
    427        ret = 1;
    428    }
    429
    430    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    431    f_res = f_max / f_min;
    432    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    433    if ((mxcsr & EXC) != (OE | PE)) {
    434        printf("FAIL: float div overflow\n");
    435        ret = 1;
    436    }
    437    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    438    f_res = f_one / f_third;
    439    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    440    if ((mxcsr & EXC) != PE) {
    441        printf("FAIL: float div inexact\n");
    442        ret = 1;
    443    }
    444    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    445    f_res = f_min / f_max;
    446    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    447    if ((mxcsr & EXC) != (UE | PE)) {
    448        printf("FAIL: float div underflow\n");
    449        ret = 1;
    450    }
    451    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    452    f_res = f_one / f_zero;
    453    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    454    if ((mxcsr & EXC) != ZE) {
    455        printf("FAIL: float div 1 0\n");
    456        ret = 1;
    457    }
    458    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    459    f_res = f_inf / f_zero;
    460    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    461    if ((mxcsr & EXC) != 0) {
    462        printf("FAIL: float div inf 0\n");
    463        ret = 1;
    464    }
    465    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    466    f_res = f_nan / f_zero;
    467    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    468    if ((mxcsr & EXC) != 0) {
    469        printf("FAIL: float div nan 0\n");
    470        ret = 1;
    471    }
    472    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    473    f_res = f_zero / f_zero;
    474    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    475    if ((mxcsr & EXC) != IE) {
    476        printf("FAIL: float div 0 0\n");
    477        ret = 1;
    478    }
    479    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    480    f_res = f_inf / f_inf;
    481    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    482    if ((mxcsr & EXC) != IE) {
    483        printf("FAIL: float div inf inf\n");
    484        ret = 1;
    485    }
    486    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    487    f_res = f_snan / f_third;
    488    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    489    if ((mxcsr & EXC) != IE) {
    490        printf("FAIL: float div snan\n");
    491        ret = 1;
    492    }
    493    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
    494    f_res = f_min / f_two;
    495    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    496    if ((mxcsr & EXC) != (UE | PE)) {
    497        printf("FAIL: float div FTZ underflow\n");
    498        ret = 1;
    499    }
    500
    501    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    502    d_res = d_max / d_min;
    503    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    504    if ((mxcsr & EXC) != (OE | PE)) {
    505        printf("FAIL: double div overflow\n");
    506        ret = 1;
    507    }
    508    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    509    d_res = d_one / d_third;
    510    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    511    if ((mxcsr & EXC) != PE) {
    512        printf("FAIL: double div inexact\n");
    513        ret = 1;
    514    }
    515    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    516    d_res = d_min / d_max;
    517    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    518    if ((mxcsr & EXC) != (UE | PE)) {
    519        printf("FAIL: double div underflow\n");
    520        ret = 1;
    521    }
    522    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    523    d_res = d_one / d_zero;
    524    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    525    if ((mxcsr & EXC) != ZE) {
    526        printf("FAIL: double div 1 0\n");
    527        ret = 1;
    528    }
    529    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    530    d_res = d_inf / d_zero;
    531    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    532    if ((mxcsr & EXC) != 0) {
    533        printf("FAIL: double div inf 0\n");
    534        ret = 1;
    535    }
    536    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    537    d_res = d_nan / d_zero;
    538    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    539    if ((mxcsr & EXC) != 0) {
    540        printf("FAIL: double div nan 0\n");
    541        ret = 1;
    542    }
    543    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    544    d_res = d_zero / d_zero;
    545    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    546    if ((mxcsr & EXC) != IE) {
    547        printf("FAIL: double div 0 0\n");
    548        ret = 1;
    549    }
    550    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    551    d_res = d_inf / d_inf;
    552    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    553    if ((mxcsr & EXC) != IE) {
    554        printf("FAIL: double div inf inf\n");
    555        ret = 1;
    556    }
    557    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    558    d_res = d_snan / d_third;
    559    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    560    if ((mxcsr & EXC) != IE) {
    561        printf("FAIL: double div snan\n");
    562        ret = 1;
    563    }
    564    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_ftz));
    565    d_res = d_min / d_two;
    566    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    567    if ((mxcsr & EXC) != (UE | PE)) {
    568        printf("FAIL: double div FTZ underflow\n");
    569        ret = 1;
    570    }
    571
    572    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    573    __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) : "0" (f_max));
    574    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    575    if ((mxcsr & EXC) != PE) {
    576        printf("FAIL: sqrtss inexact\n");
    577        ret = 1;
    578    }
    579    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    580    __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) : "0" (f_nmax));
    581    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    582    if ((mxcsr & EXC) != IE) {
    583        printf("FAIL: sqrtss -max\n");
    584        ret = 1;
    585    }
    586    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    587    __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) : "0" (f_ninf));
    588    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    589    if ((mxcsr & EXC) != IE) {
    590        printf("FAIL: sqrtss -inf\n");
    591        ret = 1;
    592    }
    593    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    594    __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) : "0" (f_snan));
    595    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    596    if ((mxcsr & EXC) != IE) {
    597        printf("FAIL: sqrtss snan\n");
    598        ret = 1;
    599    }
    600    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    601    __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) : "0" (f_nzero));
    602    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    603    if ((mxcsr & EXC) != 0) {
    604        printf("FAIL: sqrtss -0\n");
    605        ret = 1;
    606    }
    607    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    608    __asm__ volatile ("sqrtss %0, %0" : "=x" (f_res) :
    609                      "0" (-__builtin_nanf("")));
    610    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    611    if ((mxcsr & EXC) != 0) {
    612        printf("FAIL: sqrtss -nan\n");
    613        ret = 1;
    614    }
    615
    616    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    617    __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) : "0" (d_max));
    618    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    619    if ((mxcsr & EXC) != PE) {
    620        printf("FAIL: sqrtsd inexact\n");
    621        ret = 1;
    622    }
    623    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    624    __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) : "0" (d_nmax));
    625    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    626    if ((mxcsr & EXC) != IE) {
    627        printf("FAIL: sqrtsd -max\n");
    628        ret = 1;
    629    }
    630    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    631    __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) : "0" (d_ninf));
    632    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    633    if ((mxcsr & EXC) != IE) {
    634        printf("FAIL: sqrtsd -inf\n");
    635        ret = 1;
    636    }
    637    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    638    __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) : "0" (d_snan));
    639    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    640    if ((mxcsr & EXC) != IE) {
    641        printf("FAIL: sqrtsd snan\n");
    642        ret = 1;
    643    }
    644    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    645    __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) : "0" (d_nzero));
    646    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    647    if ((mxcsr & EXC) != 0) {
    648        printf("FAIL: sqrtsd -0\n");
    649        ret = 1;
    650    }
    651    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    652    __asm__ volatile ("sqrtsd %0, %0" : "=x" (d_res) :
    653                      "0" (-__builtin_nan("")));
    654    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    655    if ((mxcsr & EXC) != 0) {
    656        printf("FAIL: sqrtsd -nan\n");
    657        ret = 1;
    658    }
    659
    660    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    661    __asm__ volatile ("maxss %1, %0" : : "x" (f_nan), "x" (f_zero));
    662    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    663    if ((mxcsr & EXC) != IE) {
    664        printf("FAIL: maxss nan\n");
    665        ret = 1;
    666    }
    667    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    668    __asm__ volatile ("minss %1, %0" : : "x" (f_nan), "x" (f_zero));
    669    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    670    if ((mxcsr & EXC) != IE) {
    671        printf("FAIL: minss nan\n");
    672        ret = 1;
    673    }
    674
    675    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    676    __asm__ volatile ("maxsd %1, %0" : : "x" (d_nan), "x" (d_zero));
    677    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    678    if ((mxcsr & EXC) != IE) {
    679        printf("FAIL: maxsd nan\n");
    680        ret = 1;
    681    }
    682    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    683    __asm__ volatile ("minsd %1, %0" : : "x" (d_nan), "x" (d_zero));
    684    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    685    if ((mxcsr & EXC) != IE) {
    686        printf("FAIL: minsd nan\n");
    687        ret = 1;
    688    }
    689
    690    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    691    __asm__ volatile ("cvtsi2ss %1, %0" : "=x" (f_res) : "m" (i32_max));
    692    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    693    if ((mxcsr & EXC) != PE) {
    694        printf("FAIL: cvtsi2ss inexact\n");
    695        ret = 1;
    696    }
    697
    698    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    699    __asm__ volatile ("cvtsi2sd %1, %0" : "=x" (d_res) : "m" (i32_max));
    700    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    701    if ((mxcsr & EXC) != 0) {
    702        printf("FAIL: cvtsi2sd exact\n");
    703        ret = 1;
    704    }
    705
    706    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    707    __asm__ volatile ("cvtss2si %1, %0" : "=r" (i32_res) : "x" (1.5f));
    708    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    709    if ((mxcsr & EXC) != PE) {
    710        printf("FAIL: cvtss2si inexact\n");
    711        ret = 1;
    712    }
    713    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    714    __asm__ volatile ("cvtss2si %1, %0" : "=r" (i32_res) : "x" (0x1p31f));
    715    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    716    if ((mxcsr & EXC) != IE) {
    717        printf("FAIL: cvtss2si 0x1p31\n");
    718        ret = 1;
    719    }
    720    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    721    __asm__ volatile ("cvtss2si %1, %0" : "=r" (i32_res) : "x" (f_inf));
    722    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    723    if ((mxcsr & EXC) != IE) {
    724        printf("FAIL: cvtss2si inf\n");
    725        ret = 1;
    726    }
    727
    728    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    729    __asm__ volatile ("cvtsd2si %1, %0" : "=r" (i32_res) : "x" (1.5));
    730    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    731    if ((mxcsr & EXC) != PE) {
    732        printf("FAIL: cvtsd2si inexact\n");
    733        ret = 1;
    734    }
    735    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    736    __asm__ volatile ("cvtsd2si %1, %0" : "=r" (i32_res) : "x" (0x1p31));
    737    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    738    if ((mxcsr & EXC) != IE) {
    739        printf("FAIL: cvtsd2si 0x1p31\n");
    740        ret = 1;
    741    }
    742    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    743    __asm__ volatile ("cvtsd2si %1, %0" : "=r" (i32_res) : "x" (d_inf));
    744    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    745    if ((mxcsr & EXC) != IE) {
    746        printf("FAIL: cvtsd2si inf\n");
    747        ret = 1;
    748    }
    749
    750    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    751    __asm__ volatile ("cvttss2si %1, %0" : "=r" (i32_res) : "x" (1.5f));
    752    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    753    if ((mxcsr & EXC) != PE) {
    754        printf("FAIL: cvttss2si inexact\n");
    755        ret = 1;
    756    }
    757    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    758    __asm__ volatile ("cvttss2si %1, %0" : "=r" (i32_res) : "x" (0x1p31f));
    759    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    760    if ((mxcsr & EXC) != IE) {
    761        printf("FAIL: cvttss2si 0x1p31\n");
    762        ret = 1;
    763    }
    764    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    765    __asm__ volatile ("cvttss2si %1, %0" : "=r" (i32_res) : "x" (f_inf));
    766    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    767    if ((mxcsr & EXC) != IE) {
    768        printf("FAIL: cvttss2si inf\n");
    769        ret = 1;
    770    }
    771
    772    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    773    __asm__ volatile ("cvttsd2si %1, %0" : "=r" (i32_res) : "x" (1.5));
    774    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    775    if ((mxcsr & EXC) != PE) {
    776        printf("FAIL: cvttsd2si inexact\n");
    777        ret = 1;
    778    }
    779    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    780    __asm__ volatile ("cvttsd2si %1, %0" : "=r" (i32_res) : "x" (0x1p31));
    781    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    782    if ((mxcsr & EXC) != IE) {
    783        printf("FAIL: cvttsd2si 0x1p31\n");
    784        ret = 1;
    785    }
    786    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    787    __asm__ volatile ("cvttsd2si %1, %0" : "=r" (i32_res) : "x" (d_inf));
    788    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    789    if ((mxcsr & EXC) != IE) {
    790        printf("FAIL: cvttsd2si inf\n");
    791        ret = 1;
    792    }
    793
    794    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    795    __asm__ volatile ("rcpss %0, %0" : "=x" (f_res) : "0" (f_snan));
    796    f_res += f_one;
    797    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    798    if ((mxcsr & EXC) != 0) {
    799        printf("FAIL: rcpss snan\n");
    800        ret = 1;
    801    }
    802
    803    __asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr_default));
    804    __asm__ volatile ("rsqrtss %0, %0" : "=x" (f_res) : "0" (f_snan));
    805    f_res += f_one;
    806    __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
    807    if ((mxcsr & EXC) != 0) {
    808        printf("FAIL: rsqrtss snan\n");
    809        ret = 1;
    810    }
    811
    812    return ret;
    813}