cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

Makefile (6608B)


      1-include ../../../../config-host.mak
      2
      3CROSS=mips64el-unknown-linux-gnu-
      4
      5SIM=qemu-mipsel
      6SIM_FLAGS=-cpu 74Kf
      7
      8CC      = $(CROSS)gcc
      9CFLAGS  = -EL -mabi=32 -march=mips32r2 -mgp32 -mdsp -mdspr2 -static
     10
     11TESTCASES  = test_dsp_r1_absq_s_ph.tst
     12TESTCASES += test_dsp_r1_absq_s_w.tst
     13TESTCASES += test_dsp_r1_addq_ph.tst
     14TESTCASES += test_dsp_r1_addq_s_ph.tst
     15TESTCASES += test_dsp_r1_addq_s_w.tst
     16TESTCASES += test_dsp_r1_addsc.tst
     17TESTCASES += test_dsp_r1_addu_qb.tst
     18TESTCASES += test_dsp_r1_addu_s_qb.tst
     19TESTCASES += test_dsp_r1_addwc.tst
     20TESTCASES += test_dsp_r1_bitrev.tst
     21TESTCASES += test_dsp_r1_bposge32.tst
     22TESTCASES += test_dsp_r1_cmp_eq_ph.tst
     23TESTCASES += test_dsp_r1_cmpgu_eq_qb.tst
     24TESTCASES += test_dsp_r1_cmpgu_le_qb.tst
     25TESTCASES += test_dsp_r1_cmpgu_lt_qb.tst
     26TESTCASES += test_dsp_r1_cmp_le_ph.tst
     27TESTCASES += test_dsp_r1_cmp_lt_ph.tst
     28TESTCASES += test_dsp_r1_cmpu_eq_qb.tst
     29TESTCASES += test_dsp_r1_cmpu_le_qb.tst
     30TESTCASES += test_dsp_r1_cmpu_lt_qb.tst
     31TESTCASES += test_dsp_r1_dpaq_sa_l_w.tst
     32TESTCASES += test_dsp_r1_dpaq_s_w_ph.tst
     33TESTCASES += test_dsp_r1_dpau_h_qbl.tst
     34TESTCASES += test_dsp_r1_dpau_h_qbr.tst
     35TESTCASES += test_dsp_r1_dpsq_sa_l_w.tst
     36TESTCASES += test_dsp_r1_dpsq_s_w_ph.tst
     37TESTCASES += test_dsp_r1_dpsu_h_qbl.tst
     38TESTCASES += test_dsp_r1_dpsu_h_qbr.tst
     39TESTCASES += test_dsp_r1_extp.tst
     40TESTCASES += test_dsp_r1_extpdp.tst
     41TESTCASES += test_dsp_r1_extpdpv.tst
     42TESTCASES += test_dsp_r1_extpv.tst
     43TESTCASES += test_dsp_r1_extr_rs_w.tst
     44TESTCASES += test_dsp_r1_extr_r_w.tst
     45TESTCASES += test_dsp_r1_extr_s_h.tst
     46TESTCASES += test_dsp_r1_extrv_rs_w.tst
     47TESTCASES += test_dsp_r1_extrv_r_w.tst
     48TESTCASES += test_dsp_r1_extrv_s_h.tst
     49TESTCASES += test_dsp_r1_extrv_w.tst
     50TESTCASES += test_dsp_r1_extr_w.tst
     51TESTCASES += test_dsp_r1_insv.tst
     52TESTCASES += test_dsp_r1_lbux.tst
     53TESTCASES += test_dsp_r1_lhx.tst
     54TESTCASES += test_dsp_r1_lwx.tst
     55TESTCASES += test_dsp_r1_madd.tst
     56TESTCASES += test_dsp_r1_maddu.tst
     57TESTCASES += test_dsp_r1_maq_sa_w_phl.tst
     58TESTCASES += test_dsp_r1_maq_sa_w_phr.tst
     59TESTCASES += test_dsp_r1_maq_s_w_phl.tst
     60TESTCASES += test_dsp_r1_maq_s_w_phr.tst
     61TESTCASES += test_dsp_r1_mfhi.tst
     62TESTCASES += test_dsp_r1_mflo.tst
     63TESTCASES += test_dsp_r1_modsub.tst
     64TESTCASES += test_dsp_r1_msub.tst
     65TESTCASES += test_dsp_r1_msubu.tst
     66TESTCASES += test_dsp_r1_mthi.tst
     67TESTCASES += test_dsp_r1_mthlip.tst
     68TESTCASES += test_dsp_r1_mtlo.tst
     69TESTCASES += test_dsp_r1_muleq_s_w_phl.tst
     70TESTCASES += test_dsp_r1_muleq_s_w_phr.tst
     71TESTCASES += test_dsp_r1_muleu_s_ph_qbl.tst
     72TESTCASES += test_dsp_r1_muleu_s_ph_qbr.tst
     73TESTCASES += test_dsp_r1_mulq_rs_ph.tst
     74TESTCASES += test_dsp_r1_mult.tst
     75TESTCASES += test_dsp_r1_multu.tst
     76TESTCASES += test_dsp_r1_packrl_ph.tst
     77TESTCASES += test_dsp_r1_pick_ph.tst
     78TESTCASES += test_dsp_r1_pick_qb.tst
     79TESTCASES += test_dsp_r1_precequ_ph_qbla.tst
     80TESTCASES += test_dsp_r1_precequ_ph_qbl.tst
     81TESTCASES += test_dsp_r1_precequ_ph_qbra.tst
     82TESTCASES += test_dsp_r1_precequ_ph_qbr.tst
     83TESTCASES += test_dsp_r1_preceq_w_phl.tst
     84TESTCASES += test_dsp_r1_preceq_w_phr.tst
     85TESTCASES += test_dsp_r1_preceu_ph_qbla.tst
     86TESTCASES += test_dsp_r1_preceu_ph_qbl.tst
     87TESTCASES += test_dsp_r1_preceu_ph_qbra.tst
     88TESTCASES += test_dsp_r1_preceu_ph_qbr.tst
     89TESTCASES += test_dsp_r1_precrq_ph_w.tst
     90TESTCASES += test_dsp_r1_precrq_qb_ph.tst
     91TESTCASES += test_dsp_r1_precrq_rs_ph_w.tst
     92TESTCASES += test_dsp_r1_precrqu_s_qb_ph.tst
     93TESTCASES += test_dsp_r1_raddu_w_qb.tst
     94TESTCASES += test_dsp_r1_rddsp.tst
     95TESTCASES += test_dsp_r1_repl_ph.tst
     96TESTCASES += test_dsp_r1_repl_qb.tst
     97TESTCASES += test_dsp_r1_replv_ph.tst
     98TESTCASES += test_dsp_r1_replv_qb.tst
     99TESTCASES += test_dsp_r1_shilo.tst
    100TESTCASES += test_dsp_r1_shilov.tst
    101TESTCASES += test_dsp_r1_shll_ph.tst
    102TESTCASES += test_dsp_r1_shll_qb.tst
    103TESTCASES += test_dsp_r1_shll_s_ph.tst
    104TESTCASES += test_dsp_r1_shll_s_w.tst
    105TESTCASES += test_dsp_r1_shllv_ph.tst
    106TESTCASES += test_dsp_r1_shllv_qb.tst
    107TESTCASES += test_dsp_r1_shllv_s_ph.tst
    108TESTCASES += test_dsp_r1_shllv_s_w.tst
    109TESTCASES += test_dsp_r1_shra_ph.tst
    110TESTCASES += test_dsp_r1_shra_r_ph.tst
    111TESTCASES += test_dsp_r1_shra_r_w.tst
    112TESTCASES += test_dsp_r1_shrav_ph.tst
    113TESTCASES += test_dsp_r1_shrav_r_ph.tst
    114TESTCASES += test_dsp_r1_shrav_r_w.tst
    115TESTCASES += test_dsp_r1_shrl_qb.tst
    116TESTCASES += test_dsp_r1_shrlv_qb.tst
    117TESTCASES += test_dsp_r1_subq_ph.tst
    118TESTCASES += test_dsp_r1_subq_s_ph.tst
    119TESTCASES += test_dsp_r1_subq_s_w.tst
    120TESTCASES += test_dsp_r1_subu_qb.tst
    121TESTCASES += test_dsp_r1_subu_s_qb.tst
    122TESTCASES += test_dsp_r1_wrdsp.tst
    123TESTCASES += test_dsp_r2_absq_s_qb.tst
    124TESTCASES += test_dsp_r2_addqh_ph.tst
    125TESTCASES += test_dsp_r2_addqh_r_ph.tst
    126TESTCASES += test_dsp_r2_addqh_r_w.tst
    127TESTCASES += test_dsp_r2_addqh_w.tst
    128TESTCASES += test_dsp_r2_adduh_qb.tst
    129TESTCASES += test_dsp_r2_adduh_r_qb.tst
    130TESTCASES += test_dsp_r2_addu_ph.tst
    131TESTCASES += test_dsp_r2_addu_s_ph.tst
    132TESTCASES += test_dsp_r2_append.tst
    133TESTCASES += test_dsp_r2_balign.tst
    134TESTCASES += test_dsp_r2_cmpgdu_eq_qb.tst
    135TESTCASES += test_dsp_r2_cmpgdu_le_qb.tst
    136TESTCASES += test_dsp_r2_cmpgdu_lt_qb.tst
    137TESTCASES += test_dsp_r2_dpaqx_sa_w_ph.tst
    138TESTCASES += test_dsp_r2_dpa_w_ph.tst
    139TESTCASES += test_dsp_r2_dpax_w_ph.tst
    140TESTCASES += test_dsp_r2_dpaqx_s_w_ph.tst
    141TESTCASES += test_dsp_r2_dpsqx_sa_w_ph.tst
    142TESTCASES += test_dsp_r2_dpsqx_s_w_ph.tst
    143TESTCASES += test_dsp_r2_dps_w_ph.tst
    144TESTCASES += test_dsp_r2_dpsx_w_ph.tst
    145TESTCASES += test_dsp_r2_mul_ph.tst
    146TESTCASES += test_dsp_r2_mulq_rs_w.tst
    147TESTCASES += test_dsp_r2_mulq_s_ph.tst
    148TESTCASES += test_dsp_r2_mulq_s_w.tst
    149TESTCASES += test_dsp_r2_mulsaq_s_w_ph.tst
    150TESTCASES += test_dsp_r2_mulsa_w_ph.tst
    151TESTCASES += test_dsp_r2_mul_s_ph.tst
    152TESTCASES += test_dsp_r2_precr_qb_ph.tst
    153TESTCASES += test_dsp_r2_precr_sra_ph_w.tst
    154TESTCASES += test_dsp_r2_precr_sra_r_ph_w.tst
    155TESTCASES += test_dsp_r2_prepend.tst
    156TESTCASES += test_dsp_r2_shra_qb.tst
    157TESTCASES += test_dsp_r2_shra_r_qb.tst
    158TESTCASES += test_dsp_r2_shrav_qb.tst
    159TESTCASES += test_dsp_r2_shrav_r_qb.tst
    160TESTCASES += test_dsp_r2_shrl_ph.tst
    161TESTCASES += test_dsp_r2_shrlv_ph.tst
    162TESTCASES += test_dsp_r2_subqh_ph.tst
    163TESTCASES += test_dsp_r2_subqh_r_ph.tst
    164TESTCASES += test_dsp_r2_subqh_r_w.tst
    165TESTCASES += test_dsp_r2_subqh_w.tst
    166TESTCASES += test_dsp_r2_subuh_qb.tst
    167TESTCASES += test_dsp_r2_subuh_r_qb.tst
    168TESTCASES += test_dsp_r2_subu_ph.tst
    169TESTCASES += test_dsp_r2_subu_s_ph.tst
    170
    171
    172all: $(TESTCASES)
    173
    174%.tst: %.c
    175	$(CC) $(CFLAGS) $< -o $@
    176
    177check: $(TESTCASES)
    178	@for case in $(TESTCASES); do \
    179        echo $(SIM) $(SIM_FLAGS) ./$$case;\
    180        $(SIM) $(SIM_FLAGS) ./$$case; \
    181	done
    182
    183clean:
    184	$(RM) -rf $(TESTCASES)