cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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test_dsp_r1_extp.c (1203B)

      1#include<stdio.h>
      2#include<assert.h>
      3
      4int main()
      5{
      6    int rt, ach, acl, dsp;
      7    int result;
      8
      9    ach = 0x05;
     10    acl = 0xB4CB;
     11    dsp = 0x07;
     12    result = 0x000C;
     13
     14    __asm
     15        ("wrdsp %1, 0x01\n\t"
     16         "mthi %2, $ac1\n\t"
     17         "mtlo %3, $ac1\n\t"
     18         "extp %0, $ac1, 0x03\n\t"
     19         "rddsp %1\n\t"
     20         : "=r"(rt), "+r"(dsp)
     21         : "r"(ach), "r"(acl)
     22        );
     23    dsp = (dsp >> 14) & 0x01;
     24    assert(dsp == 0);
     25    assert(result == rt);
     26
     27    ach = 0x05;
     28    acl = 0xB4CB;
     29    dsp = 0x01;
     30
     31    __asm
     32        ("wrdsp %1, 0x01\n\t"
     33         "mthi %2, $ac1\n\t"
     34         "mtlo %3, $ac1\n\t"
     35         "extp %0, $ac1, 0x03\n\t"
     36         "rddsp %1\n\t"
     37         : "=r"(rt), "+r"(dsp)
     38         : "r"(ach), "r"(acl)
     39        );
     40    dsp = (dsp >> 14) & 0x01;
     41    assert(dsp == 1);
     42
     43    ach = 0;
     44    acl = 0x80000001;
     45    dsp = 0x1F;
     46    result = 0x80000001;
     47
     48    __asm
     49        ("wrdsp %1\n\t"
     50         "mthi %2, $ac2\n\t"
     51         "mtlo %3, $ac2\n\t"
     52         "extp %0, $ac2, 0x1F\n\t"
     53         "rddsp %1\n\t"
     54         : "=r"(rt), "+r"(dsp)
     55         : "r"(ach), "r"(acl)
     56        );
     57    dsp = (dsp >> 14) & 0x01;
     58    assert(dsp == 0);
     59    assert(result == rt);
     60
     61    return 0;
     62}