cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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test_mips64r6_dclz.c (4837B)

      1/*
      2 *  Test program for MIPS64R6 instruction DCLZ
      3 *
      4 *  Copyright (C) 2019  Wave Computing, Inc.
      5 *  Copyright (C) 2019  Aleksandar Markovic <amarkovic@wavecomp.com>
      6 *
      7 *  This program is free software: you can redistribute it and/or modify
      8 *  it under the terms of the GNU General Public License as published by
      9 *  the Free Software Foundation, either version 2 of the License, or
     10 *  (at your option) any later version.
     11 *
     12 *  This program is distributed in the hope that it will be useful,
     13 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
     14 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     15 *  GNU General Public License for more details.
     16 *
     17 *  You should have received a copy of the GNU General Public License
     18 *  along with this program.  If not, see <https://www.gnu.org/licenses/>.
     19 *
     20 */
     21
     22#include <sys/time.h>
     23#include <stdint.h>
     24
     25#include "../../../../include/wrappers_mips64r6.h"
     26#include "../../../../include/test_inputs_64.h"
     27#include "../../../../include/test_utils_64.h"
     28
     29#define TEST_COUNT_TOTAL (PATTERN_INPUTS_64_COUNT + RANDOM_INPUTS_64_COUNT)
     30
     31
     32int32_t main(void)
     33{
     34    char *isa_ase_name = "mips64r6";
     35    char *group_name = "Bit Count";
     36    char *instruction_name =   "DCLZ";
     37    int32_t ret;
     38    uint32_t i;
     39    struct timeval start, end;
     40    double elapsed_time;
     41
     42    uint64_t b64_result[TEST_COUNT_TOTAL];
     43    uint64_t b64_expect[TEST_COUNT_TOTAL] = {
     44        0x0000000000000000ULL,                    /*   0  */
     45        0x0000000000000040ULL,
     46        0x0000000000000000ULL,
     47        0x0000000000000001ULL,
     48        0x0000000000000000ULL,
     49        0x0000000000000002ULL,
     50        0x0000000000000000ULL,
     51        0x0000000000000003ULL,
     52        0x0000000000000000ULL,                    /*   8  */
     53        0x0000000000000004ULL,
     54        0x0000000000000000ULL,
     55        0x0000000000000005ULL,
     56        0x0000000000000000ULL,
     57        0x0000000000000006ULL,
     58        0x0000000000000000ULL,
     59        0x0000000000000007ULL,
     60        0x0000000000000000ULL,                    /*  16  */
     61        0x0000000000000008ULL,
     62        0x0000000000000000ULL,
     63        0x0000000000000009ULL,
     64        0x0000000000000000ULL,
     65        0x000000000000000aULL,
     66        0x0000000000000000ULL,
     67        0x000000000000000bULL,
     68        0x0000000000000000ULL,                    /*  24  */
     69        0x000000000000000cULL,
     70        0x0000000000000000ULL,
     71        0x000000000000000dULL,
     72        0x0000000000000000ULL,
     73        0x000000000000000eULL,
     74        0x0000000000000000ULL,
     75        0x000000000000000fULL,
     76        0x0000000000000000ULL,                    /*  32  */
     77        0x0000000000000010ULL,
     78        0x0000000000000000ULL,
     79        0x0000000000000011ULL,
     80        0x0000000000000000ULL,
     81        0x0000000000000012ULL,
     82        0x0000000000000000ULL,
     83        0x0000000000000013ULL,
     84        0x0000000000000000ULL,                    /*  40  */
     85        0x0000000000000014ULL,
     86        0x0000000000000000ULL,
     87        0x0000000000000015ULL,
     88        0x0000000000000000ULL,
     89        0x0000000000000016ULL,
     90        0x0000000000000000ULL,
     91        0x0000000000000017ULL,
     92        0x0000000000000000ULL,                    /*  48  */
     93        0x0000000000000018ULL,
     94        0x0000000000000000ULL,
     95        0x0000000000000019ULL,
     96        0x0000000000000000ULL,
     97        0x000000000000001aULL,
     98        0x0000000000000000ULL,
     99        0x000000000000001bULL,
    100        0x0000000000000000ULL,                    /*  56  */
    101        0x000000000000001cULL,
    102        0x0000000000000000ULL,
    103        0x000000000000001dULL,
    104        0x0000000000000000ULL,
    105        0x000000000000001eULL,
    106        0x0000000000000000ULL,
    107        0x000000000000001fULL,
    108        0x0000000000000000ULL,                    /*  64  */
    109        0x0000000000000000ULL,
    110        0x0000000000000000ULL,
    111        0x0000000000000001ULL,
    112        0x0000000000000000ULL,
    113        0x0000000000000000ULL,
    114        0x0000000000000000ULL,
    115        0x0000000000000000ULL,
    116        0x0000000000000002ULL,                    /*  72  */
    117        0x0000000000000000ULL,
    118        0x0000000000000000ULL,
    119        0x0000000000000000ULL,
    120        0x0000000000000000ULL,
    121        0x0000000000000000ULL,
    122        0x0000000000000001ULL,
    123        0x0000000000000000ULL,
    124    };
    125
    126    gettimeofday(&start, NULL);
    127
    128    for (i = 0; i < TEST_COUNT_TOTAL; i++) {
    129        if (i < PATTERN_INPUTS_64_COUNT) {
    130            do_mips64r6_DCLZ(b64_pattern + i, b64_result + i);
    131        } else {
    132            do_mips64r6_DCLZ(b64_random + (i - PATTERN_INPUTS_64_COUNT),
    133                             b64_result + i);
    134        }
    135    }
    136
    137    gettimeofday(&end, NULL);
    138
    139    elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0;
    140    elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0;
    141
    142    ret = check_results_64(instruction_name, TEST_COUNT_TOTAL, elapsed_time,
    143                           b64_result, b64_expect);
    144
    145    return ret;
    146}