cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

exrl-trtr.c (1051B)

      1#include <stdint.h>
      2#include <unistd.h>
      3
      4int main(void)
      5{
      6    char op1[] = {0, 1, 2, 3};
      7    char op2[256];
      8    uint64_t r1 = 0xffffffffffffffffull;
      9    uint64_t r2 = 0xffffffffffffffffull;
     10    uint64_t cc;
     11    int i;
     12
     13    for (i = 0; i < 256; i++) {
     14        if (i == 1) {
     15            op2[i] = 0xbb;
     16        } else {
     17            op2[i] = 0;
     18        }
     19    }
     20    asm volatile(
     21        "    j 2f\n"
     22        "1:  trtr 3(1,%[op1]),%[op2]\n"
     23        "2:  exrl %[op1_len],1b\n"
     24        "    lgr %[r1],%%r1\n"
     25        "    lgr %[r2],%%r2\n"
     26        "    ipm %[cc]\n"
     27        : [r1] "+r" (r1),
     28          [r2] "+r" (r2),
     29          [cc] "=r" (cc)
     30        : [op1] "a" (&op1),
     31          [op1_len] "a" (3),
     32          [op2] "Q" (op2)
     33        : "r1", "r2", "cc");
     34    cc = (cc >> 28) & 3;
     35    if (cc != 1) {
     36        write(1, "bad cc\n", 7);
     37        return 1;
     38    }
     39    if ((char *)r1 != &op1[1]) {
     40        write(1, "bad r1\n", 7);
     41        return 1;
     42    }
     43    if (r2 != 0xffffffffffffffbbull) {
     44        write(1, "bad r2\n", 7);
     45        return 1;
     46    }
     47    return 0;
     48}