cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

linker.ld.S (3905B)

      1#include "core-isa.h"
      2
      3#ifndef XCHAL_VECBASE_RESET_VADDR
      4#define XCHAL_VECBASE_RESET_VADDR XCHAL_WINDOW_VECTORS_VADDR
      5#define XCHAL_WINDOW_OF4_VECOFS   0x00000000
      6#define XCHAL_WINDOW_UF4_VECOFS   0x00000040
      7#define XCHAL_WINDOW_OF8_VECOFS   0x00000080
      8#define XCHAL_WINDOW_UF8_VECOFS   0x000000C0
      9#define XCHAL_WINDOW_OF12_VECOFS  0x00000100
     10#define XCHAL_WINDOW_UF12_VECOFS  0x00000140
     11#endif
     12
     13#define RAM_SIZE 0x08000000  /* 128M */
     14#define ROM_SIZE 0x00001000  /* 4k */
     15#define VECTORS_RESERVED_SIZE 0x1000
     16
     17#if XCHAL_HAVE_BE
     18OUTPUT_FORMAT("elf32-xtensa-be")
     19#else
     20OUTPUT_FORMAT("elf32-xtensa-le")
     21#endif
     22ENTRY(_start)
     23
     24MEMORY {
     25    ram : ORIGIN = XCHAL_VECBASE_RESET_VADDR, LENGTH = RAM_SIZE
     26    rom : ORIGIN = XCHAL_RESET_VECTOR_VADDR, LENGTH = ROM_SIZE
     27}
     28
     29SECTIONS
     30{
     31    .init :
     32    {
     33        *(.init)
     34        *(.init.*)
     35    } > rom
     36
     37#if XCHAL_HAVE_WINDOWED
     38    .vector.window XCHAL_WINDOW_VECTORS_VADDR :
     39    {
     40    . = XCHAL_WINDOW_OF4_VECOFS;
     41        *(.vector.window_overflow_4)
     42    . = XCHAL_WINDOW_UF4_VECOFS;
     43        *(.vector.window_underflow_4)
     44    . = XCHAL_WINDOW_OF8_VECOFS;
     45        *(.vector.window_overflow_8)
     46    . = XCHAL_WINDOW_UF8_VECOFS;
     47        *(.vector.window_underflow_8)
     48    . = XCHAL_WINDOW_OF12_VECOFS;
     49        *(.vector.window_overflow_12)
     50    . = XCHAL_WINDOW_UF12_VECOFS;
     51        *(.vector.window_underflow_12)
     52    }
     53#endif
     54#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 2
     55    .vector.level2 XCHAL_INTLEVEL2_VECTOR_VADDR :
     56    {
     57        *(.vector.level2)
     58    }
     59#endif
     60#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 3
     61    .vector.level3 XCHAL_INTLEVEL3_VECTOR_VADDR :
     62    {
     63        *(.vector.level3)
     64    }
     65#endif
     66#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 4
     67    .vector.level4 XCHAL_INTLEVEL4_VECTOR_VADDR :
     68    {
     69        *(.vector.level4)
     70    }
     71#endif
     72#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 5
     73    .vector.level5 XCHAL_INTLEVEL5_VECTOR_VADDR :
     74    {
     75        *(.vector.level5)
     76    }
     77#endif
     78#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 6
     79    .vector.level6 XCHAL_INTLEVEL6_VECTOR_VADDR :
     80    {
     81        *(.vector.level6)
     82    }
     83#endif
     84#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 7
     85    .vector.level7 XCHAL_INTLEVEL7_VECTOR_VADDR :
     86    {
     87        *(.vector.level7)
     88    }
     89#endif
     90    .vector.kernel XCHAL_KERNEL_VECTOR_VADDR :
     91    {
     92        *(.vector.kernel)
     93    }
     94    .vector.user XCHAL_USER_VECTOR_VADDR :
     95    {
     96        *(.vector.user)
     97    }
     98    .vector.double XCHAL_DOUBLEEXC_VECTOR_VADDR :
     99    {
    100        *(.vector.double)
    101    }
    102
    103    .vector.text XCHAL_VECBASE_RESET_VADDR + VECTORS_RESERVED_SIZE :
    104    {
    105        *(.vector.window_overflow_4.*)
    106        *(.vector.window_underflow_4.*)
    107        *(.vector.window_overflow_8.*)
    108        *(.vector.window_underflow_8.*)
    109        *(.vector.window_overflow_12.*)
    110        *(.vector.window_underflow_12.*)
    111
    112        *(.vector.level2.*)
    113        *(.vector.level3.*)
    114        *(.vector.level4.*)
    115        *(.vector.level5.*)
    116        *(.vector.level6.*)
    117        *(.vector.level7.*)
    118
    119        *(.vector.kernel.*)
    120        *(.vector.user.*)
    121        *(.vector.double.*)
    122    } > ram
    123
    124    .text :
    125    {
    126        _ftext = .;
    127        *(.text .stub .text.* .gnu.linkonce.t.* .literal .literal.*)
    128        _etext = .;
    129    } > ram
    130
    131    .rodata :
    132    {
    133        . = ALIGN(4);
    134        _frodata = .;
    135        *(.rodata .rodata.* .gnu.linkonce.r.*)
    136        *(.rodata1)
    137        _erodata = .;
    138    } > ram
    139
    140    .data :
    141    {
    142        . = ALIGN(4);
    143        _fdata = .;
    144        *(.data .data.* .gnu.linkonce.d.*)
    145        *(.data1)
    146        _gp = ALIGN(16);
    147        *(.sdata .sdata.* .gnu.linkonce.s.*)
    148        _edata = .;
    149    } > ram
    150
    151    .bss :
    152    {
    153        . = ALIGN(4);
    154        _fbss = .;
    155        *(.dynsbss)
    156        *(.sbss .sbss.* .gnu.linkonce.sb.*)
    157        *(.scommon)
    158        *(.dynbss)
    159        *(.bss .bss.* .gnu.linkonce.b.*)
    160        *(COMMON)
    161        _ebss = .;
    162        _end = .;
    163    } > ram
    164}
    165
    166PROVIDE(_fstack = (ORIGIN(ram) & 0xf0000000) + LENGTH(ram) - 16);