test_interrupt.S (5210B)
1#include "macros.inc" 2 3#define LSBIT(v) ((v) & -(v)) 4 5#define LEVEL_MASK(x) glue3(XCHAL_INTLEVEL, x, _MASK) 6#define LEVEL_SOFT_MASK(x) (LEVEL_MASK(x) & XCHAL_INTTYPE_MASK_SOFTWARE) 7 8#define L1_SOFT_MASK LEVEL_SOFT_MASK(1) 9#define L1_SOFT LSBIT(L1_SOFT_MASK) 10 11#if LEVEL_SOFT_MASK(2) 12#define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK(2) 13#elif LEVEL_SOFT_MASK(3) 14#define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK(3) 15#elif LEVEL_SOFT_MASK(4) 16#define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK(4) 17#elif LEVEL_SOFT_MASK(5) 18#define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK(5) 19#elif LEVEL_SOFT_MASK(6) 20#define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK(6) 21#else 22#define HIGH_LEVEL_SOFT_MASK 0 23#endif 24 25#define HIGH_LEVEL_SOFT LSBIT(HIGH_LEVEL_SOFT_MASK) 26 27#if LEVEL_SOFT_MASK(2) 28#define HIGH_LEVEL_SOFT_LEVEL 2 29#elif LEVEL_SOFT_MASK(3) 30#define HIGH_LEVEL_SOFT_LEVEL 3 31#elif LEVEL_SOFT_MASK(4) 32#define HIGH_LEVEL_SOFT_LEVEL 4 33#elif LEVEL_SOFT_MASK(5) 34#define HIGH_LEVEL_SOFT_LEVEL 5 35#elif LEVEL_SOFT_MASK(6) 36#define HIGH_LEVEL_SOFT_LEVEL 6 37#else 38#define HIGH_LEVEL_SOFT_LEVEL 0 39#endif 40 41test_suite interrupt 42 43#if XCHAL_HAVE_INTERRUPTS 44 45.macro clear_interrupts 46 movi a2, 0 47 wsr a2, intenable 48#if XCHAL_NUM_TIMERS 49 wsr a2, ccompare0 50#endif 51#if XCHAL_NUM_TIMERS > 1 52 wsr a2, ccompare1 53#endif 54#if XCHAL_NUM_TIMERS > 2 55 wsr a2, ccompare2 56#endif 57 esync 58 rsr a2, interrupt 59 wsr a2, intclear 60 61 esync 62 rsr a2, interrupt 63 assert eqi, a2, 0 64.endm 65 66.macro check_l1 67 rsr a2, ps 68 movi a3, 0x1f /* EXCM | INTMASK */ 69 and a2, a2, a3 70 assert eqi, a2, 0x10 /* only EXCM is set for level-1 interrupt */ 71 rsr a2, exccause 72 assert eqi, a2, 4 73.endm 74 75test rsil 76 clear_interrupts 77 78 rsr a2, ps 79 rsil a3, 7 80 rsr a4, ps 81 assert eq, a2, a3 82 movi a2, 0xf 83 and a2, a4, a2 84 assert eqi, a2, 7 85 xor a3, a3, a4 86 movi a2, 0xfffffff0 87 and a2, a3, a2 88 assert eqi, a2, 0 89test_end 90 91#if L1_SOFT 92test soft_disabled 93 set_vector kernel, 1f 94 clear_interrupts 95 96 movi a2, L1_SOFT 97 wsr a2, intset 98 esync 99 rsr a3, interrupt 100 movi a4, ~XCHAL_INTTYPE_MASK_TIMER 101 and a3, a3, a4 102 assert eq, a2, a3 103 wsr a2, intclear 104 esync 105 rsr a3, interrupt 106 and a3, a3, a4 107 assert eqi, a3, 0 108 j 2f 1091: 110 test_fail 1112: 112test_end 113 114test soft_intenable 115 set_vector kernel, 1f 116 clear_interrupts 117 118 movi a2, L1_SOFT 119 wsr a2, intset 120 esync 121 rsr a3, interrupt 122 movi a4, ~XCHAL_INTTYPE_MASK_TIMER 123 and a3, a3, a4 124 assert eq, a2, a3 125 rsil a3, 0 126 wsr a2, intenable 127 esync 128 test_fail 1291: 130 check_l1 131test_end 132 133test soft_rsil 134 set_vector kernel, 1f 135 clear_interrupts 136 137 movi a2, L1_SOFT 138 wsr a2, intset 139 esync 140 rsr a3, interrupt 141 movi a4, ~XCHAL_INTTYPE_MASK_TIMER 142 and a3, a3, a4 143 assert eq, a2, a3 144 wsr a2, intenable 145 rsil a3, 0 146 esync 147 test_fail 1481: 149 check_l1 150test_end 151 152test soft_waiti 153 set_vector kernel, 1f 154 clear_interrupts 155 156 movi a2, L1_SOFT 157 wsr a2, intset 158 esync 159 rsr a3, interrupt 160 movi a4, ~XCHAL_INTTYPE_MASK_TIMER 161 and a3, a3, a4 162 assert eq, a2, a3 163 wsr a2, intenable 164 waiti 0 165 test_fail 1661: 167 check_l1 168test_end 169 170test soft_user 171 set_vector kernel, 1f 172 set_vector user, 2f 173 clear_interrupts 174 175 movi a2, L1_SOFT 176 wsr a2, intset 177 esync 178 rsr a3, interrupt 179 movi a4, ~XCHAL_INTTYPE_MASK_TIMER 180 and a3, a3, a4 181 assert eq, a2, a3 182 wsr a2, intenable 183 184 rsr a2, ps 185 movi a3, 0x20 186 or a2, a2, a3 187 wsr a2, ps 188 waiti 0 1891: 190 test_fail 1912: 192 check_l1 193test_end 194 195#if HIGH_LEVEL_SOFT 196test soft_priority 197 set_vector kernel, 1f 198 set_vector glue(level, HIGH_LEVEL_SOFT_LEVEL), 2f 199 clear_interrupts 200 201 movi a2, L1_SOFT | HIGH_LEVEL_SOFT 202 wsr a2, intenable 203 rsil a3, 0 204 esync 205 wsr a2, intset 206 esync 2071: 208 test_fail 2092: 210 rsr a2, ps 211 movi a3, 0x1f /* EXCM | INTMASK */ 212 and a2, a2, a3 213 movi a3, 0x10 | HIGH_LEVEL_SOFT_LEVEL 214 assert eq, a2, a3 /* EXCM and INTMASK are set 215 for high-priority interrupt */ 216test_end 217#endif 218#endif 219 220#if HIGH_LEVEL_SOFT 221test eps_epc_rfi 222 set_vector glue(level, HIGH_LEVEL_SOFT_LEVEL), 3f 223 clear_interrupts 224 reset_ps 225 226 movi a2, L1_SOFT_MASK | HIGH_LEVEL_SOFT_MASK 227 wsr a2, intenable 228 rsil a3, 0 229 rsr a3, ps 230 esync 231 wsr a2, intset 2321: 233 esync 2342: 235 test_fail 2363: 237 rsr a2, glue(eps, HIGH_LEVEL_SOFT_LEVEL) 238 assert eq, a2, a3 239 rsr a2, glue(epc, HIGH_LEVEL_SOFT_LEVEL) 240 movi a3, 1b 241 assert ge, a2, a3 242 movi a3, 2b 243 assert ge, a3, a2 244 movi a2, 4f 245 wsr a2, glue(epc, HIGH_LEVEL_SOFT_LEVEL) 246 movi a2, 0x40000 | HIGH_LEVEL_SOFT_LEVEL 247 wsr a2, glue(eps, HIGH_LEVEL_SOFT_LEVEL) 248 rfi HIGH_LEVEL_SOFT_LEVEL 249 test_fail 2504: 251 rsr a2, ps 252 movi a3, 0x40000 | HIGH_LEVEL_SOFT_LEVEL 253 assert eq, a2, a3 254test_end 255#endif 256 257#endif 258 259test_suite_end