cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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test_loop.S (2385B)


      1#include "macros.inc"
      2
      3test_suite loop
      4
      5#if XCHAL_HAVE_LOOPS
      6
      7test loop
      8    movi    a2, 0
      9    movi    a3, 5
     10    loop    a3, 1f
     11    addi    a2, a2, 1
     121:
     13    assert  eqi, a2, 5
     14test_end
     15
     16test loop0
     17    movi    a2, 0
     18    loop    a2, 1f
     19    rsr     a2, lcount
     20    assert  eqi, a2, -1
     21    j       1f
     221:
     23test_end
     24
     25test loop_jump
     26    movi    a2, 0
     27    movi    a3, 5
     28    loop    a3, 1f
     29    addi    a2, a2, 1
     30    j       1f
     311:
     32    assert  eqi, a2, 1
     33test_end
     34
     35test loop_branch
     36    movi    a2, 0
     37    movi    a3, 5
     38    loop    a3, 1f
     39    addi    a2, a2, 1
     40    beqi    a2, 3, 1f
     411:
     42    assert  eqi, a2, 3
     43test_end
     44
     45test loop_manual
     46    movi    a2, 0
     47    movi    a3, 5
     48    movi    a4, 1f
     49    movi    a5, 2f
     50    wsr     a3, lcount
     51    wsr     a4, lbeg
     52    wsr     a5, lend
     53    isync
     54    j       1f
     55.align 4
     561:
     57    addi    a2, a2, 1
     582:
     59    assert  eqi, a2, 6
     60test_end
     61
     62test loop_excm
     63    movi    a2, 0
     64    movi    a3, 5
     65    rsr     a4, ps
     66    movi    a5, 0x10
     67    or      a4, a4, a5
     68    wsr     a4, ps
     69    isync
     70    loop    a3, 1f
     71    addi    a2, a2, 1
     721:
     73    xor     a4, a4, a5
     74    isync
     75    wsr     a4, ps
     76    assert  eqi, a2, 1
     77test_end
     78
     79test lbeg_invalidation
     80    movi    a2, 0
     81    movi    a3, 1
     82    movi    a4, 1f
     83    movi    a5, 3f
     84    wsr     a3, lcount
     85    wsr     a4, lbeg
     86    wsr     a5, lend
     87    isync
     88    j       1f
     89.align 4
     901:
     91    addi    a2, a2, 1
     92    j       2f
     93.align 4
     942:
     95    addi    a2, a2, 2
     96    movi    a3, 2b
     97    wsr     a3, lbeg
     98    isync
     99    nop
    1003:
    101    assert  eqi, a2, 5
    102test_end
    103
    104test lend_invalidation
    105    movi    a2, 0
    106    movi    a3, 5
    107    movi    a4, 1f
    108    movi    a5, 2f
    109    wsr     a3, lcount
    110    wsr     a4, lbeg
    111    wsr     a5, lend
    112    isync
    113    j       1f
    114.align 4
    1151:
    116    addi    a2, a2, 1
    1172:
    118    beqi    a3, 3, 1f
    119    assert  eqi, a2, 6
    120    movi    a3, 3
    121    wsr     a3, lcount
    122    wsr     a4, lend
    123    isync
    124    j       1b
    1251:
    126    assert  eqi, a2, 7
    127test_end
    128
    129test loopnez
    130    movi    a2, 0
    131    movi    a3, 5
    132    loopnez a3, 1f
    133    addi    a2, a2, 1
    1341:
    135    assert  eqi, a2, 5
    136
    137    movi    a2, 0
    138    movi    a3, 0
    139    loopnez a3, 1f
    140    test_fail
    1411:
    142test_end
    143
    144test loopgtz
    145    movi    a2, 0
    146    movi    a3, 5
    147    loopgtz a3, 1f
    148    addi    a2, a2, 1
    1491:
    150    assert  eqi, a2, 5
    151
    152    movi    a2, 0
    153    movi    a3, 0
    154    loopgtz a3, 1f
    155    test_fail
    1561:
    157
    158    movi    a2, 0
    159    movi    a3, 0x80000000
    160    loopgtz a3, 1f
    161    test_fail
    1621:
    163test_end
    164
    165#endif
    166
    167test_suite_end