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path: root/tcg/region.c
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* tcg/mips: Drop special alignment for code_gen_bufferRichard Henderson2021-09-211-91/+0
* tcg: Move tb_phys_invalidate_count to tb_ctxRichard Henderson2021-07-091-14/+0
* tcg: Bake tb_destroy() into tcg_region_treeLiren Wei2021-07-091-11/+8
* tcg: When allocating for !splitwx, begin with PROT_NONERichard Henderson2021-06-131-10/+9
* tcg: Merge buffer protection and guard page protectionRichard Henderson2021-06-131-14/+31
* tcg: Round the tb_size default from qemu_get_host_physmemRichard Henderson2021-06-131-26/+21
* tcg: Sink qemu_madvise call to common codeRichard Henderson2021-06-131-7/+7
* tcg: Return the map protection from alloc_code_gen_bufferRichard Henderson2021-06-131-30/+33
* tcg: Allocate code_gen_buffer into struct tcg_region_stateRichard Henderson2021-06-131-37/+27
* tcg: Move in_code_gen_buffer and tests to region.cRichard Henderson2021-06-111-0/+34
* tcg: Tidy split_cross_256mbRichard Henderson2021-06-111-10/+9
* tcg: Tidy tcg_n_regionsRichard Henderson2021-06-111-17/+12
* tcg: Rename region.start to region.after_prologueRichard Henderson2021-06-111-7/+8
* tcg: Replace region.end with region.total_sizeRichard Henderson2021-06-111-12/+18
* tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.hRichard Henderson2021-06-111-28/+5
* tcg: Introduce tcg_max_ctxsRichard Henderson2021-06-111-3/+3
* accel/tcg: Pass down max_cpus to tcg_initRichard Henderson2021-06-111-21/+11
* accel/tcg: Move alloc_code_gen_buffer to tcg/region.cRichard Henderson2021-06-111-5/+426
* tcg: Split out region.cRichard Henderson2021-06-111-0/+572
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