cachepc

commit dbb1ac88094516d1165c9e43c4a79cbc3a18d7d1
parent da9326a66bd534de38ab07dac96e8af051e94923
Author: Louis Burda <quent.burda@gmail.com>
Date:   Thu,  2 Feb 2023 10:37:15 -0600

Set default frequency to 1.5GHz and adjust apic timer divide accordingly

Diffstat:
M
Makefile
 | 
4
+++-
M
cachepc/cachepc.c
 | 
2
+-
M
cachepc/const.h
 | 
5
+++--
M
cachepc/event.c
 | 
3
++-

4 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/Makefile b/Makefile
@@ -60,7 +60,9 @@ load:
 
 prep:
 	sudo sh -c "echo 0 > /proc/sys/kernel/watchdog"
-	sudo cpupower frequency-set -g powersave
+	sudo sh -c "echo 1500000 > /sys/devices/system/cpu/cpu2/cpufreq/scaling_min_freq"
+	sudo sh -c "echo 1500000 > /sys/devices/system/cpu/cpu2/cpufreq/scaling_max_freq"
+	sudo sh -c "echo 1500000 > /sys/devices/system/cpu/cpu2/cpufreq/scaling_min_freq"
 	sudo bash -c "for f in /proc/irq/*/smp_affinity; do echo 1 > \$$f 2>/dev/null; done"
 
 util/%: util/%.c $(UTIL_SRCS)
diff --git a/cachepc/cachepc.c b/cachepc/cachepc.c
@@ -216,7 +216,7 @@ void
 cpc_apic_oneshot_run(uint32_t interval)
 {
 	native_apic_mem_write(APIC_LVTT, LOCAL_TIMER_VECTOR | APIC_LVT_TIMER_ONESHOT);
-	native_apic_mem_write(APIC_TDCR, APIC_TDR_DIV_1);
+	native_apic_mem_write(APIC_TDCR, CPC_APIC_TIMER_TDCR);
 	native_apic_mem_write(APIC_TMICT, interval / CPC_APIC_TIMER_SOFTDIV);
 }
 EXPORT_SYMBOL(cpc_apic_oneshot_run);
diff --git a/cachepc/const.h b/cachepc/const.h
@@ -20,7 +20,8 @@
 #define CPC_CL_PREV_OFFSET 8
 #define CPC_CL_COUNT_OFFSET 16
 
-#define CPC_APIC_TIMER_SOFTDIV 3
-#define CPC_APIC_TIMER_MIN (50 * CPC_APIC_TIMER_SOFTDIV)
+#define CPC_APIC_TIMER_TDCR APIC_TDR_DIV_2 // APIC_TDR_DIV_1
+#define CPC_APIC_TIMER_SOFTDIV 1
+#define CPC_APIC_TIMER_MIN (100 * CPC_APIC_TIMER_SOFTDIV)
 
 #define CPC_EVENT_BATCH_MAX 1000
diff --git a/cachepc/event.c b/cachepc/event.c
@@ -72,7 +72,8 @@ cpc_send_event(struct cpc_event event)
 	}
 
 	if (cpc_event_batching) {
-		if (cpc_eventbuf_len < CPC_EVENT_BATCH_MAX) {
+		if (event.type != CPC_EVENT_GUEST
+				&& cpc_eventbuf_len < CPC_EVENT_BATCH_MAX) {
 			event.id = 0;
 			memcpy(&cpc_eventbuf[cpc_eventbuf_len], &event,
 				sizeof(struct cpc_event));