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| author | Louis Burda <quent.burda@gmail.com> | 2022-09-06 14:30:25 +0200 |
|---|---|---|
| committer | Louis Burda <quent.burda@gmail.com> | 2022-09-06 14:30:25 +0200 |
| commit | d4ca1bb9a12e64e8b0a09f7a4316eda628f4edf1 (patch) | |
| tree | 460813f60890216aabdcbfa1af1cb77e51170653 /kmod/cachepc.h | |
| parent | 24d7c448e49e3dc2abbf3bc804247fb30410775a (diff) | |
| download | cachepc-d4ca1bb9a12e64e8b0a09f7a4316eda628f4edf1.tar.gz cachepc-d4ca1bb9a12e64e8b0a09f7a4316eda628f4edf1.zip | |
Improve register saving and restoring for prime & probe around vmrun
Diffstat (limited to 'kmod/cachepc.h')
| -rw-r--r--[-rwxr-xr-x] | kmod/cachepc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/kmod/cachepc.h b/kmod/cachepc.h index eff4661..6237eba 100755..100644 --- a/kmod/cachepc.h +++ b/kmod/cachepc.h @@ -45,6 +45,9 @@ extern size_t cachepc_msrmts_count; extern cache_ctx *cachepc_ctx; extern cacheline *cachepc_ds; +extern uint64_t cachepc_regs_tmp[16]; +extern uint64_t cachepc_regs_vm[16]; + /* * Prime phase: fill the target cache (encoded in the size of the data structure) * with the prepared data structure, i.e. with attacker data. |