Inline prime and probe into vmenter.S for better accuracy

2 files changed, 19 insertions, 0 deletions

diff --git a/kmod/cachepc.c b/kmod/cachepc.c
index 1dcb764..63500a5 100755
--- a/kmod/cachepc.c
+++ b/kmod/cachepc.c
@@ -16,6 +16,22 @@ static void build_randomized_list_for_cache_set(cache_ctx *ctx, cacheline **cach
 static cacheline **allocate_cache_ds(cache_ctx *ctx);
 static uint16_t get_virt_cache_set(cache_ctx *ctx, void *ptr);
 
+cacheline *cachepc_prime_cl = NULL;
+
+void
+cachepc_prime_vcall(uintptr_t ret, cacheline *cl)
+{
+	cachepc_prime(cl);
+	asm volatile ("mov %0, %%rax; jmp *%%rax" : : "r"(ret) : "rax");
+}
+
+void
+cachepc_probe_vcall(uintptr_t ret, cacheline *cl)
+{
+	cachepc_probe(cl);
+	asm volatile ("mov %0, %%rax; jmp *%%rax" : : "r"(ret) : "rax");
+}
+
 void
 cachepc_init_pmc(uint8_t index, uint8_t event_no, uint8_t event_mask)
 {
diff --git a/kmod/cachepc.h b/kmod/cachepc.h
index 13d38ca..eff4661 100755
--- a/kmod/cachepc.h
+++ b/kmod/cachepc.h
@@ -21,6 +21,9 @@ void *cachepc_aligned_alloc(size_t alignment, size_t size);
 void cachepc_save_msrmts(cacheline *head);
 void cachepc_print_msrmts(cacheline *head);
 
+void cachepc_prime_vcall(uintptr_t ret, cacheline *cl);
+void cachepc_probe_vcall(uintptr_t ret, cacheline *cl);
+
 __attribute__((always_inline))
 static inline cacheline *cachepc_prime(cacheline *head);