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| author | Louis Burda <quent.burda@gmail.com> | 2022-11-22 15:03:02 +0100 |
|---|---|---|
| committer | Louis Burda <quent.burda@gmail.com> | 2022-11-22 15:03:02 +0100 |
| commit | 82d56ef77c114ac0b375fef04cea3a50f10f1843 (patch) | |
| tree | 397acfbcb5f1c2584a03f6201d95120d6f299361 /notes | |
| parent | afe49b52f6b2ac52efe8e610e64ee07c7c2efef4 (diff) | |
| download | cachepc-82d56ef77c114ac0b375fef04cea3a50f10f1843.tar.gz cachepc-82d56ef77c114ac0b375fef04cea3a50f10f1843.zip | |
Improved single stepping and added initial cpuid events
Diffstat (limited to 'notes')
| -rw-r--r-- | notes | 28 |
1 files changed, 0 insertions, 28 deletions
@@ -1,28 +0,0 @@ -Observations: - -Questions: -- test/sevstep: why 0 then 15, arent both accesses in the first page? - => first code page and stack access -- test/sevstep: why does it seem to work with event race but not without? - => it doesnt (anymore) - -Next steps: -- enable single-steping with multiple page faults (only one ends up in - last_fault_gfn and others stay untracked) -- try adjusting timer for single stepping -- Try to setup the non-baseline step without apic, but remapping page - such that we see the relevant page faults and the gfn increment -- test/sevstep: implement counter.. read program memory to see - how many instructions were executed on apic timer - -Meeting questions: -- Why is decrypted rip sometimes off-by-one? - => -- VM gets interrupted independent of our APIC (by the scheduler?) was this a problem for you? - => -- Is supplementing apic with waiting for next fault viable? (seems to work well actually) - => -- How does single stepping work with fixed cpu frequency when we always step less than one instruction? - => - - |
