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| author | Louis Burda <quent.burda@gmail.com> | 2022-08-13 16:44:04 +0200 |
|---|---|---|
| committer | Louis Burda <quent.burda@gmail.com> | 2022-08-13 16:45:08 +0200 |
| commit | 98babf91dcf166bc7644a3d70a90dac272f12a75 (patch) | |
| tree | 529acab95367ae6ed35eddf0731ee82f73c94842 /src/device_conf.h | |
| parent | 88d598bc2894c28d8dd9c2259c5c8cbe2ec7ce55 (diff) | |
| download | cachepc-98babf91dcf166bc7644a3d70a90dac272f12a75.tar.gz cachepc-98babf91dcf166bc7644a3d70a90dac272f12a75.zip | |
Reorder repo into module and tests
Diffstat (limited to 'src/device_conf.h')
| -rwxr-xr-x | src/device_conf.h | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/src/device_conf.h b/src/device_conf.h deleted file mode 100755 index e24d681..0000000 --- a/src/device_conf.h +++ /dev/null @@ -1,29 +0,0 @@ -#pragma once - -// TODO: Read from kernel headers - -// General settings -// #define PAGE_SIZE 4096 -#define PROCESSOR_FREQ 2900000000 - -// Cache related settings -#define CACHELINE_SIZE 64 -#define CACHE_GROUP_SIZE (PAGE_SIZE / CACHELINE_SIZE) - -// Addressing: -// - virtual: 0 -// - physical: 1 -#define L1_ADDRESSING 0 -#define L1_SETS 64 -#define L1_ASSOCIATIVITY 8 -#define L1_ACCESS_TIME 4 - -#define L2_ADDRESSING 1 -#define L2_SETS 512 -#define L2_ASSOCIATIVITY 8 -#define L2_ACCESS_TIME 12 - -#define L3_ADDRESSING 1 -#define L3_SETS 4096 -#define L3_ASSOCIATIVITY 16 -#define L3_ACCESS_TIME 30 |