diff options
| author | Louis Burda <quent.burda@gmail.com> | 2022-11-02 14:21:35 +0100 |
|---|---|---|
| committer | Louis Burda <quent.burda@gmail.com> | 2022-11-02 14:56:56 +0100 |
| commit | 61d67ae0927eeade04171374a91a1adaa4d94a28 (patch) | |
| tree | 1a81678c61e98d2802a0874e044b49bd1cff11f4 /test/aes-detect.c | |
| parent | 434a6210041dd447acae38b95561a2d990efa153 (diff) | |
| download | cachepc-61d67ae0927eeade04171374a91a1adaa4d94a28.tar.gz cachepc-61d67ae0927eeade04171374a91a1adaa4d94a28.zip | |
Outline aes-detection guest host setup
Diffstat (limited to 'test/aes-detect.c')
| -rw-r--r-- | test/aes-detect.c | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/test/aes-detect.c b/test/aes-detect.c new file mode 100644 index 0000000..d95148b --- /dev/null +++ b/test/aes-detect.c @@ -0,0 +1,85 @@ +#include "cachepc/uapi.h" + +#include <stdint.h> + +#define ACCESS_LINE(n) \ + asm volatile ("mov (%0), %%rbx" \ + : : "r"(((uint8_t*) L1) + n * L1_LINESIZE) : "rbx"); + +#define DO_ACCESS_PATTERN() \ + ACCESS_LINE(60) \ + ACCESS_LINE(13) \ + ACCESS_LINE(24) \ + ACCESS_LINE(19) \ + ACCESS_LINE(38) \ + ACCESS_LINE(17) \ + ACCESS_LINE( 2) \ + ACCESS_LINE(12) \ + ACCESS_LINE(22) \ + ACCESS_LINE(46) \ + ACCESS_LINE( 4) \ + ACCESS_LINE(61) \ + ACCESS_LINE( 5) \ + ACCESS_LINE(14) \ + ACCESS_LINE(11) \ + ACCESS_LINE(35) \ + ACCESS_LINE(45) \ + ACCESS_LINE(10) \ + ACCESS_LINE(49) \ + ACCESS_LINE(56) \ + ACCESS_LINE(27) \ + ACCESS_LINE(37) \ + ACCESS_LINE(63) \ + ACCESS_LINE(54) \ + ACCESS_LINE(55) \ + ACCESS_LINE(29) \ + ACCESS_LINE(48) \ + ACCESS_LINE( 9) \ + ACCESS_LINE(16) \ + ACCESS_LINE(39) \ + ACCESS_LINE(20) \ + ACCESS_LINE(21) \ + ACCESS_LINE(62) \ + ACCESS_LINE( 0) \ + ACCESS_LINE(34) \ + ACCESS_LINE( 8) \ + ACCESS_LINE(53) \ + ACCESS_LINE(42) \ + ACCESS_LINE(51) \ + ACCESS_LINE(50) \ + ACCESS_LINE(57) \ + ACCESS_LINE( 7) \ + ACCESS_LINE( 6) \ + ACCESS_LINE(33) \ + ACCESS_LINE(26) \ + ACCESS_LINE(40) \ + ACCESS_LINE(58) \ + ACCESS_LINE( 1) \ + ACCESS_LINE(44) \ + ACCESS_LINE(23) \ + ACCESS_LINE(25) \ + ACCESS_LINE(47) \ + ACCESS_LINE(15) \ + ACCESS_LINE(36) \ + ACCESS_LINE( 3) \ + ACCESS_LINE(41) \ + ACCESS_LINE(52) \ + ACCESS_LINE(59) \ + ACCESS_LINE(18) \ + ACCESS_LINE(31) \ + ACCESS_LINE(28) \ + ACCESS_LINE(32) \ + ACCESS_LINE(30) \ + ACCESS_LINE(43) + +/* corresponding physical memory will also be page-aligned, + * in our case PAGE_SIZE is the size of our L1 without associativity */ +#pragma DATA_ALIGN(L1, PAGE_SIZE) +uint8_t L1[L1_SETS * L1_LINESIZE]; + +int sync_access_pattern[] = { + 60, 13, 24, 19, 38, 17, 2, 12, 22, 46, 4, 61, 5, 14, 11, 35, + 45, 10, 49, 56, 27, 37, 63, 54, 55, 29, 48, 9, 16, 39, 20, 21, + 62, 0, 34, 8, 53, 42, 51, 50, 57, 7, 6, 33, 26, 40, 58, 1, + 44, 23, 25, 47, 15, 36, 3, 41, 52, 59, 18, 31, 28, 32, 30, 43 +}; |