1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
|
#ifndef MEMORY_INLINE_H
#define MEMORY_INLINE_H
#include "CommonMemoryRule.h"
#include "IORegistersMemoryRule.h"
inline u8 Memory::Read(u16 address)
{
#ifndef GEARBOY_DISABLE_DISASSEMBLER
CheckBreakpoints(address, false);
#endif
switch (address & 0xE000)
{
case 0x0000:
{
if (!m_bBootromRegistryDisabled)
{
if (m_bCGB)
{
if (m_bBootromGBCEnabled && m_bBootromGBCLoaded && ((address < 0x0100) || (address < 0x0900 && address > 0x01FF)))
return m_pBootromGBC[address];
}
else
{
if (m_bBootromDMGEnabled && m_bBootromDMGLoaded && (address < 0x0100))
return m_pBootromDMG[address];
}
}
return m_pCurrentMemoryRule->PerformRead(address);
}
case 0x2000:
case 0x4000:
case 0x6000:
{
return m_pCurrentMemoryRule->PerformRead(address);
}
case 0x8000:
{
return m_pCommonMemoryRule->PerformRead(address);
}
case 0xA000:
{
return m_pCurrentMemoryRule->PerformRead(address);
}
case 0xC000:
case 0xE000:
{
if (address < 0xFF00)
return m_pCommonMemoryRule->PerformRead(address);
else
return m_pIORegistersMemoryRule->PerformRead(address);
}
default:
{
return Retrieve(address);
}
}
}
inline void Memory::Write(u16 address, u8 value)
{
#ifndef GEARBOY_DISABLE_DISASSEMBLER
CheckBreakpoints(address, true);
#endif
switch (address & 0xE000)
{
case 0x0000:
case 0x2000:
case 0x4000:
case 0x6000:
{
m_pCurrentMemoryRule->PerformWrite(address, value);
break;
}
case 0x8000:
{
m_pCommonMemoryRule->PerformWrite(address, value);
break;
}
case 0xA000:
{
m_pCurrentMemoryRule->PerformWrite(address, value);
break;
}
case 0xC000:
case 0xE000:
{
if (address < 0xFF00)
m_pCommonMemoryRule->PerformWrite(address, value);
else
m_pIORegistersMemoryRule->PerformWrite(address, value);
break;
}
default:
{
Load(address, value);
break;
}
}
}
inline u8 Memory::ReadCGBWRAM(u16 address)
{
if (address < 0xD000)
return m_pWRAMBanks[(address - 0xC000)];
else
return m_pWRAMBanks[(address - 0xD000) + (0x1000 * m_iCurrentWRAMBank)];
}
inline void Memory::WriteCGBWRAM(u16 address, u8 value)
{
if (address < 0xD000)
m_pWRAMBanks[(address - 0xC000)] = value;
else
m_pWRAMBanks[(address - 0xD000) + (0x1000 * m_iCurrentWRAMBank)] = value;
}
inline void Memory::SwitchCGBWRAM(u8 value)
{
m_iCurrentWRAMBank = value;
if (m_iCurrentWRAMBank == 0)
m_iCurrentWRAMBank = 1;
}
inline u8 Memory::ReadCGBLCDRAM(u16 address, bool forceBank1)
{
if (forceBank1 || (m_iCurrentLCDRAMBank == 1))
return m_pLCDRAMBank1[address - 0x8000];
else
return Retrieve(address);
}
inline void Memory::WriteCGBLCDRAM(u16 address, u8 value)
{
if (m_iCurrentLCDRAMBank == 1)
m_pLCDRAMBank1[address - 0x8000] = value;
else
Load(address, value);
}
inline void Memory::SwitchCGBLCDRAM(u8 value)
{
m_iCurrentLCDRAMBank = value;
}
inline u8 Memory::Retrieve(u16 address)
{
return m_pMap[address];
}
inline void Memory::Load(u16 address, u8 value)
{
m_pMap[address] = value;
}
inline Memory::stDisassembleRecord** Memory::GetDisassembledMemoryMap()
{
return m_pDisassembledMap;
}
inline Memory::stDisassembleRecord** Memory::GetDisassembledROMMemoryMap()
{
return m_pDisassembledROMMap;
}
inline void Memory::CheckBreakpoints(u16 address, bool write)
{
std::size_t size = m_BreakpointsMem.size();
for (std::size_t b = 0; b < size; b++)
{
if (write && !m_BreakpointsMem[b].write)
continue;
if (!write && !m_BreakpointsMem[b].read)
continue;
bool proceed = false;
if (m_BreakpointsMem[b].range)
{
if ((address >= m_BreakpointsMem[b].address1) && (address <= m_BreakpointsMem[b].address2))
{
proceed = true;
}
}
else
{
if (m_BreakpointsMem[b].address1 == address)
{
proceed = true;
}
}
if (proceed)
{
m_pProcessor->RequestMemoryBreakpoint();
break;
}
}
}
#endif /* MEMORY_INLINE_H */
|
