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* Use 5.1K resistor instead of 4.7K for vregLouis Burda2024-11-093-3/+3
* Fix usbc port tolerances and silk screenLouis Burda2024-10-275-4322/+1353
* Add v-cut separated dual usb boardLouis Burda2024-09-2140-52454/+20922
* Rev 0Louis Burda2024-08-3039-10537/+35035
* Switch to open drain driving (still has ESD issue)Louis Burda2024-08-1932-4942/+40782
* Assign footprints and add solder jumperLouis Burda2024-08-175-595/+10480
* Add blink test firmware, docs and new schematic iterationsLouis Burda2024-08-138-6/+15348
* Initial model designLouis Burda2024-07-147-0/+97263