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| author | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2022-07-06 17:08:21 +0530 |
|---|---|---|
| committer | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2022-07-13 17:27:23 -0500 |
| commit | 8a8d70316d4958dc6f715bf2ed6e0cb108030978 (patch) | |
| tree | 9c4c1a22a49fe3a4fb524199091773b14c30ca4e /include/linux/timerqueue.h | |
| parent | aced2ea70b45759ca2d67d06de74169e454032b5 (diff) | |
| download | cachepc-linux-8a8d70316d4958dc6f715bf2ed6e0cb108030978.tar.gz cachepc-linux-8a8d70316d4958dc6f715bf2ed6e0cb108030978.zip | |
iommu/amd: Specify PCI segment ID when getting pci device
Upcoming AMD systems can have multiple PCI segments. Hence pass PCI
segment ID to pci_get_domain_bus_and_slot() instead of '0'.
Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Link: https://lore.kernel.org/r/20220706113825.25582-32-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions