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| author | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2022-07-06 17:08:22 +0530 |
|---|---|---|
| committer | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2022-07-13 17:27:23 -0500 |
| commit | f0da6420632fab792811f3fa8d93dc3cb8b96ee6 (patch) | |
| tree | a90dc8c676007d121457a4a08c9b39cd87c74c23 /include/linux/timerqueue.h | |
| parent | 8a8d70316d4958dc6f715bf2ed6e0cb108030978 (diff) | |
| download | cachepc-linux-f0da6420632fab792811f3fa8d93dc3cb8b96ee6.tar.gz cachepc-linux-f0da6420632fab792811f3fa8d93dc3cb8b96ee6.zip | |
iommu/amd: Add PCI segment support for ivrs_[ioapic/hpet/acpihid] commands
By default, PCI segment is zero and can be omitted. To support system
with non-zero PCI segment ID, modify the parsing functions to allow
PCI segment ID.
Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Link: https://lore.kernel.org/r/20220706113825.25582-33-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions