| Commit message (Expand) | Author | Age | Files | Lines | ||
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| | | | | | * | | clk: qcom: gcc: Add GPU and NPU clocks for SM8150 | Vinod Koul | 2020-05-14 | 1 | -0/+64 | |
| | | | | | * | | clk: qcom: mmcc-msm8996: Properly describe GPU_GX gdsc | Bjorn Andersson | 2020-05-14 | 1 | -0/+2 | |
| | | | | | * | | clk: qcom: gdsc: Handle GDSC regulator supplies | Bjorn Andersson | 2020-05-14 | 2 | -0/+27 | |
| | | | | | * | | clk: qcom: msm8916: Fix the address location of pll->config_reg | Bryan O'Donoghue | 2020-04-21 | 1 | -4/+4 | |
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| | | | | * | | clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unused | Stephen Boyd | 2020-05-28 | 1 | -1/+1 | |
| | | | | * | | clk: X1000: Add FIXDIV for SSI clock of X1000. | 周琰杰 (Zhou Yanjie) | 2020-05-28 | 1 | -6/+111 | |
| | | | | * | | clk: Ingenic: Add CGU driver for X1830. | 周琰杰 (Zhou Yanjie) | 2020-05-28 | 3 | -0/+459 | |
| | | | | * | | clk: Ingenic: Adjust cgu code to make it compatible with X1830. | 周琰杰 (Zhou Yanjie) | 2020-05-28 | 7 | -4/+41 | |
| | | | | * | | clk: Ingenic: Remove unnecessary spinlock when reading registers. | 周琰杰 (Zhou Yanjie) | 2020-05-28 | 1 | -11/+1 | |
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| | | | * | | clk: intel: remove redundant initialization of variable rate64 | Colin Ian King | 2020-05-28 | 1 | -1/+1 | |
| | | | * | | clk: intel: Add CGU clock driver for a new SoC | Rahul Tanwar | 2020-05-26 | 7 | -0/+1612 | |
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| | | * | | clk: mmp2: Add audio clock controller driver | Lubomir Rintel | 2020-05-27 | 3 | -0/+450 | |
| | | * | | clk: mmp2: Add support for power islands | Lubomir Rintel | 2020-05-27 | 4 | -1/+168 | |
| | | * | | clk: mmp2: Add the audio clock | Lubomir Rintel | 2020-05-27 | 1 | -0/+4 | |
| | | * | | clk: mmp2: Add the I2S clocks | Lubomir Rintel | 2020-05-27 | 1 | -0/+46 | |
| | | * | | clk: mmp2: Rename mmp2_pll_init() to mmp2_main_clk_init() | Lubomir Rintel | 2020-05-27 | 1 | -2/+2 | |
| | | * | | clk: mmp2: Move thermal register defines up a bit | Lubomir Rintel | 2020-05-27 | 1 | -4/+4 | |
| | | * | | clk: mmp: frac: Allow setting bits other than the numerator/denominator | Lubomir Rintel | 2020-05-27 | 2 | -0/+4 | |
| | | * | | clk: mmp: frac: Do not lose last 4 digits of precision | Lubomir Rintel | 2020-05-27 | 1 | -8/+16 | |
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| | *-------. \ | Merge branches 'clk-unisoc', 'clk-trivial', 'clk-bcm', 'clk-st' and 'clk-ast2... | Stephen Boyd | 2020-06-01 | 10 | -66/+136 | |
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| | | | | | | * | | clk: ast2600: Fix AHB clock divider for A1 | Eddie James | 2020-05-27 | 1 | -6/+25 | |
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| | | | | | * / | clk: clk-flexgen: fix clock-critical handling | Alain Volmat | 2020-05-27 | 1 | -0/+1 | |
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| | | | | * | | clk: bcm2835: Constify struct debugfs_reg32 | Rikard Falkeborn | 2020-05-27 | 1 | -3/+3 | |
| | | | | * | | clk: bcm2835: Remove casting to bcm2835_clk_register | Nathan Chancellor | 2020-05-26 | 1 | -31/+37 | |
| | | | | * | | clk: bcm2835: Fix return type of bcm2835_register_gate | Nathan Chancellor | 2020-05-26 | 1 | -5/+5 | |
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| | | | * | | clk: versatile: remove redundant assignment to pointer clk | Colin Ian King | 2020-05-26 | 1 | -1/+1 | |
| | | | * | | clk: clk-xgene: Fix a typo in Kconfig | Christophe JAILLET | 2020-05-05 | 1 | -1/+1 | |
| | | | * | | clk: Remove unused inline function clk_debug_reparent | YueHaibing | 2020-05-05 | 1 | -4/+0 | |
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| | | * | | clk: sprd: add mipi_csi_xx gate clocks | Chunyan Zhang | 2020-05-26 | 1 | -0/+32 | |
| | | * | | clk: sprd: check its parent status before reading gate clock | Chunyan Zhang | 2020-05-26 | 2 | -0/+16 | |
| | | * | | clk: sprd: return correct type of value for _sprd_pll_recalc_rate | Chunyan Zhang | 2020-05-26 | 1 | -1/+1 | |
| | | * | | clk: sprd: mark the local clock symbols static | Chunyan Zhang | 2020-05-26 | 1 | -16/+16 | |
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| | *---------. \ | Merge branches 'clk-tegra', 'clk-imx', 'clk-zynq', 'clk-socfpga', 'clk-at91' ... | Stephen Boyd | 2020-06-01 | 52 | -346/+1805 | |
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| | | | | | | | * | | clk: ti: dra7: remove two unused symbols | Jason Yan | 2020-05-26 | 1 | -9/+0 | |
| | | | | | | | * | | clk: ti: dra7xx: fix RNG clock parent | Tero Kristo | 2020-05-14 | 1 | -1/+1 | |
| | | | | | | | * | | clk: ti: dra7xx: mark MCAN clock as DRA76x only | Tero Kristo | 2020-05-14 | 1 | -1/+1 | |
| | | | | | | | * | | clk: ti: dra7xx: fix gpu clkctrl parent | Tero Kristo | 2020-05-14 | 1 | -1/+1 | |
| | | | | | | | * | | clk: ti: omap5: Add proper parent clocks for l4-secure clocks | Tero Kristo | 2020-05-14 | 1 | -7/+7 | |
| | | | | | | | * | | clk: ti: omap4: Add proper parent clocks for l4-secure clocks | Tero Kristo | 2020-05-14 | 1 | -7/+7 | |
| | | | | | | | * | | clk: ti: composite: fix memory leak | Tero Kristo | 2020-05-14 | 1 | -0/+1 | |
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| | | | | | | * | | clk: at91: allow setting all PMC clock parents via DT | Michał Mirosław | 2020-05-26 | 10 | -10/+38 | |
| | | | | | | * | | clk: at91: allow setting PCKx parent via DT | Michał Mirosław | 2020-05-26 | 12 | -13/+45 | |
| | | | | | | * | | clk: at91: optimize pmc data allocation | Michał Mirosław | 2020-05-26 | 12 | -37/+20 | |
| | | | | | | * | | clk: at91: pmc: decrement node's refcount | Claudiu Beznea | 2020-05-26 | 1 | -0/+1 | |
| | | | | | | * | | clk: at91: pmc: do not continue if compatible not located | Claudiu Beznea | 2020-05-26 | 1 | -0/+2 | |
| | | | | | | * | | clk: at91: Add peripheral clock for PTC | Codrin Ciubotariu | 2020-05-26 | 1 | -0/+1 | |
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| | | | | | * | | clk: socfpga: agilex: add clock driver for the Agilex platform | Dinh Nguyen | 2020-05-26 | 5 | -1/+528 | |
| | | | | | * | | clk: socfpga: add const to _ops data structures | Dinh Nguyen | 2020-05-26 | 3 | -4/+4 | |
| | | | | | * | | clk: socfpga: remove clk_ops enable/disable methods | Dinh Nguyen | 2020-05-26 | 3 | -6/+0 | |
| | | | | | * | | clk: socfpga: stratix10: use new parent data scheme | Dinh Nguyen | 2020-05-26 | 5 | -41/+146 | |
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